JAJSHR8G July   2008  – July 2019 LM3421 , LM3423

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      代表的な昇圧アプリケーション
  4. 改訂履歴
  5. Device Comparison
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Current Regulators
      2. 8.3.2  Predictive Off-Time (PRO) Control
      3. 8.3.3  Average LED Current
      4. 8.3.4  Analog Dimming
      5. 8.3.5  Current Sense and Current Limit
      6. 8.3.6  Overcurrent Protection
      7. 8.3.7  Zero Current Shutdown
      8. 8.3.8  Control Loop Compensation
      9. 8.3.9  Start-Up Regulator
      10. 8.3.10 Overvoltage Lockout (OVLO)
      11. 8.3.11 Input Undervoltage Lockout (UVLO)
        1. 8.3.11.1 UVLO Only
        2. 8.3.11.2 PWM Dimming and UVLO
      12. 8.3.12 PWM Dimming
      13. 8.3.13 LM3423 Only: DPOL, FLT, TIMR, and LRDY
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Inductor
      2. 9.1.2 LED Dynamic Resistance
      3. 9.1.3 Output Capacitor
      4. 9.1.4 Input Capacitors
      5. 9.1.5 Main MOSFET / Dimming MOSFET
      6. 9.1.6 Re-Circulating Diode
      7. 9.1.7 Boost Inrush Current
      8. 9.1.8 Switching Frequency
    2. 9.2 Typical Applications
      1. 9.2.1 Basic Topology Schematics
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1  Operating Point
          2. 9.2.1.2.2  Switching Frequency
          3. 9.2.1.2.3  Average LED Current
          4. 9.2.1.2.4  Inductor Ripple Current
          5. 9.2.1.2.5  LED Ripple Current
          6. 9.2.1.2.6  Peak Current Limit
          7. 9.2.1.2.7  Loop Compensation
          8. 9.2.1.2.8  Input Capacitance
          9. 9.2.1.2.9  N-channel FET
            1. 9.2.1.2.9.1 Boost and Buck-Boost
          10. 9.2.1.2.10 Diode
          11. 9.2.1.2.11 Output OVLO
          12. 9.2.1.2.12 Input UVLO
          13. 9.2.1.2.13 PWM Dimming Method
          14. 9.2.1.2.14 Analog Dimming Method
      2. 9.2.2 LM3421 Buck-Boost Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1  Operating Point
          2. 9.2.2.2.2  Switching Frequency
          3. 9.2.2.2.3  Average LED Current
          4. 9.2.2.2.4  Inductor Ripple Current
          5. 9.2.2.2.5  Output Capacitance
          6. 9.2.2.2.6  Peak Current Limit
          7. 9.2.2.2.7  Loop Compensation
          8. 9.2.2.2.8  Input Capacitance
          9. 9.2.2.2.9  N-channel FET
          10. 9.2.2.2.10 Diode
          11. 9.2.2.2.11 Input UVLO
          12. 9.2.2.2.12 Output OVLO
        3. 9.2.2.3 Application Curve
      3. 9.2.3 LM3421 BOOST Application
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
      4. 9.2.4 LM3421 Buck-Boost Application
        1. 9.2.4.1 Design Requirements
        2. 9.2.4.2 Detailed Design Procedure
      5. 9.2.5 LM3423 Boost Application
        1. 9.2.5.1 Design Requirements
        2. 9.2.5.2 Detailed Design Procedure
      6. 9.2.6 LM3421 Buck-Boost Application
        1. 9.2.6.1 Design Requirements
        2. 9.2.6.2 Detailed Design Procedure
      7. 9.2.7 LM3423 Buck Application
        1. 9.2.7.1 Design Requirements
        2. 9.2.7.2 Detailed Design Procedure
      8. 9.2.8 LM3423 Buck-Boost Application
        1. 9.2.8.1 Design Requirements
        2. 9.2.8.2 Detailed Design Procedure
      9. 9.2.9 LM3421 SEPIC Application
        1. 9.2.9.1 Design Procedure
        2. 9.2.9.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
    1. 10.1 General Recommendations
    2. 10.2 Input Supply Current Limit
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 12.2 関連リンク
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Overvoltage Lockout (OVLO)

The LM3421 and LM3423 can be configured to detect an output (or input) overvoltage condition through the OVP pin. The pin features a precision 1.24-V threshold with 23 µA (typical) of hysteresis current as shown in Figure 21. When the OVLO threshold is exceeded, the GATE pin is immediately pulled low and a 23-µA current source provides hysteresis to the lower threshold of the OVLO hysteretic band.

If the LEDs are referenced to a potential other than ground (floating), as in the buck-boost and buck configuration, the output voltage (VO) should be sensed and translated to ground by using a single PNP as shown in Figure 22.

The overvoltage turnoff threshold (VTURN-OFF) is defined:

Ground Referenced

Equation 23. LM3421 LM3423 30067395.gif

Floating

Equation 24. LM3421 LM3423 30067396.gif

In the ground referenced configuration, the voltage across ROV2 is VO – 1.24 V whereas in the floating configuration it is VO – 620 mV where 620 mV approximates VBE of the PNP.

The overvoltage hysteresis (VHYSO) is defined using Equation 25.

Equation 25. LM3421 LM3423 30067397.gif
LM3421 LM3423 30067358.gifFigure 21. Overvoltage Protection Circuitry
LM3421 LM3423 30067359.gifFigure 22. Floating Output OVP Circuitry

The OVLO feature can cause some interesting results if the OVLO trip-point is set too close to VO. At turnon, the converter has a modest amount of voltage overshoot before the control loop gains control of ILED. If the overshoot exceeds the OVLO threshold, the controller shuts down, opening the dimming MOSFET. This isolates the LED load from the converter and the output capacitance. The voltage then discharges very slowly through the HSP and HSN pins until VO drops below the lower threshold, where the process repeats. This looks like the LEDs are blinking at around 2 Hz. This mode can be escaped if the input voltage is reduced.