JAJSOT1J December   2008  – June 2022 LM5088 , LM5088-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings: LM5088
    3. 6.3 ESD Ratings: LM5088-Q1
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High Voltage Low-Dropout Regulator
      2. 7.3.2  Line Undervoltage Detector
      3. 7.3.3  Oscillator and Sync Capability
      4. 7.3.4  Error Amplifier and PWM Comparator
      5. 7.3.5  Ramp Generator
      6. 7.3.6  Dropout Voltage Reduction
      7. 7.3.7  Frequency Dithering (LM5088-1 Only)
      8. 7.3.8  Cycle-by-Cycle Current Limit
      9. 7.3.9  Overload Protection Timer (LM5088-2 Only)
      10. 7.3.10 Soft Start
      11. 7.3.11 HG Output
      12. 7.3.12 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 EN Pin Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Timing Resistor
        2. 8.2.2.2  Output Inductor
        3. 8.2.2.3  Current Sense Resistor
        4. 8.2.2.4  Ramp Capacitor
        5. 8.2.2.5  Output Capacitors
        6. 8.2.2.6  Input Capacitors
        7. 8.2.2.7  VCC Capacitor
        8. 8.2.2.8  Bootstrap Capacitor
        9. 8.2.2.9  Soft-Start Capacitor
        10. 8.2.2.10 Output Voltage Divider
        11. 8.2.2.11 UVLO Divider
        12. 8.2.2.12 Restart Capacitor (LM5008-2 Only)
        13. 8.2.2.13 MOSFET Selection
        14. 8.2.2.14 Diode Selection
        15. 8.2.2.15 Snubber Components Selection
        16. 8.2.2.16 Error Amplifier Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Thermal Considerations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.11 HG Output

The LM5088 provides a high current, high-side driver and associated level shift circuit to drive an external N-channel MOSFET. The gate driver works in conjunction with an internal diode and external bootstrap capacitor. A ceramic bootstrap capacitor is recommended, and must be connected directly between the BOOT and SW pins. During the off time of the buck switch, the bootstrap capacitor charges from VCC through an internal diode. When operating with a high PWM duty cycle, the HG output is forced-off each cycle for 365 ns (maximum) to make sure that BOOT capacitor is recharged. A pre-charge circuit, comprised of a MOSFET between SW and GND, is turned ON during the forced off time to help replenish the BOOT capacitor. The pre-charge circuit provides charge to the BOOT capacitor under light load or pre-biased load conditions when the SW voltage does not remain low during the entire off time.