SNOS719G September   1999  – September 2015 LMC7101 , LMC7101Q-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings: LMC7101
    3. 6.3  ESD Ratings: LMC7101Q-Q1
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics: 2.7 V
    7. 6.7  DC Electrical Characteristics: 3 V
    8. 6.8  DC Electrical Characteristics: 5 V
    9. 6.9  DC Electrical Characteristics: 15 V
    10. 6.10 AC Electrical Characteristics: 5 V
    11. 6.11 AC Electrical Characteristics: 15 V
    12. 6.12 Typical Characteristics
      1. 6.12.1 Typical Characteristics: 2.7 V
      2. 6.12.2 Typical Characteristics: 3 V
      3. 6.12.3 Typical Characteristics: 5 V
      4. 6.12.4 Typical Characteristics: 15 V
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Benefits of the LMC7101 Tiny Amplifier
        1. 7.3.1.1 Size
        2. 7.3.1.2 Height
        3. 7.3.1.3 Signal Integrity
        4. 7.3.1.4 Simplified Board Layout
        5. 7.3.1.5 Low THD
        6. 7.3.1.6 Low Supply Current
        7. 7.3.1.7 Wide Voltage Range
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Common Mode
        1. 7.4.1.1 Voltage Range
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Rail-to-Rail Output
      2. 8.1.2 Capacitive Load Tolerance
      3. 8.1.3 Compensating for Input Capacitance When Using Large Value Feedback Resistors
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Related Links
    3. 11.3 Community Resource
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ

10 Layout

10.1 Layout Guidelines

Care must be taken to minimize the loop area formed by the bypass capacitor connection between supply pins and ground. A ground plane underneath the device is recommended; any bypass components to ground must have a nearby via to the ground plane. The optimum bypass capacitor placement is closest to the corresponding supply pin. Use of thicker traces from the bypass capacitors to the corresponding supply pins will lower the power-supply inductance and provide a more stable power supply.

The feedback components must be placed as close as possible to the device to minimize stray parasitics.

10.2 Layout Example

LMC7101 LMC7101Q-Q1 LMC7101_recommended_layout3.png Figure 68. LMC7101 Example Layout