SNOS957H April   2001  – August 2014 LMH6672

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 ±2.5V Electrical Characteristics
    7. 6.7 Typical Performance Characteristics
  7. Detailed Description
    1. 7.1 Functional Block Diagram
  8. Power Supply Recommendations
    1. 8.1 Thermal Management
  9. Device and Documentation Support
    1. 9.1 Trademarks
    2. 9.2 Electrostatic Discharge Caution
    3. 9.3 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

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メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

8 Power Supply Recommendations

8.1 Thermal Management

The LMH6672 is a high-speed, high power, dual operational amplifier with a very high slew rate and very low distortion. For ease of use, it uses conventional voltage feedback. These characteristics make the LMH6672 ideal for applications where driving low impedances of 25 to 100 Ω such as xDSL and active filters.

A class AB output stage allows the LMH6672 to deliver high currents to low impedance loads with low distortion while consuming low quiescent supply current. For most op-amps, class AB topology means that internal power dissipation is rarely an issue, even with the trend to smaller surface mount packages. However, the LMH6672 has been designed for applications where high levels of power dissipation may be encountered.

Several factors contribute to power dissipation and consequently higher junction temperatures. These factors need to be well understood if the LMH6672 is to perform to specifications in all applications. This section will examine the typical application shown in Figure 44 as an example. Because both amplifiers are in a single package, the calculations are for the total power dissipated by both amplifiers.

There are two separate contributors to the internal power dissipation:

  1. The product of the supply voltage and the quiescent current when no signal is being delivered to the external load.
  2. The additional power dissipated while delivering power to the external load.

The first of these components appears easy to calculate simply by inspecting the data sheet. The typical quiescent supply current for this part is 7.2 mA per amplifier. Therefore, with a ±6 volt supply, the total power dissipation is:

Equation 1. PD = VS × 2 × lQ = 12 × (14.4×10-3) = 173 mW

where

  • (VS = VCC + VEE)

With a thermal resistance of 172°C/W for the SOIC package, this level of internal power dissipation will result in a junction temperature (TJ) of 30°C above ambient.

Using the worst-case maximum supply current of 18 mA and an ambient of 85°C, a similar calculation results in a power dissipation of 216 mW, or a TJ of 122°C.

This is approaching the maximum allowed TJ of 150°C before a signal is applied. Fortunately, in normal operation, this term is reduced, for reasons that will soon be explained.

The second contributor to high TJ is the power dissipated internally when power is delivered to the external load. This cause of temperature rise is more difficult to calculate, even when the actual operating conditions are known.

To maintain low distortion, in a Class AB output stage, an idle current, IQ, is maintained through the output transistors when there is little or no output signal. In the LMH6672, about 4.8 mA of the total quiescent supply current of 14.4 mA flows through the output stages.

Under normal large signal conditions, as the output voltage swings positive, one transistor of the output pair will conduct the load current, while the other transistor shuts off, and dissipates no power. During the negative signal swing this situation is reversed, with the lower transistor sinking the load current while the upper transistor is cut off. The current in each transistor will approximate a half wave rectified version of the total load current.

Because the output stage idle current is now routed into the load, 4.8 mA can be subtracted from the quiescent supply current when calculating the quiescent power when the output is driving a load.

The power dissipation caused by driving a load in a DSL application, using a 1:2 turns ratio transformer driving 20 mW into the subscriber line and 20 mW into the back termination resistors, can be calculated as follows:

Equation 2. PDRIVER = PTOT – (PTERM + PLINE)

where

  • PDRIVER is the LMH6672 power dissipation
  • PTOT is the total power drawn from the power supply
  • PTERM is the power dissipated in the back termination resistors
  • PLINE is the power sent into the subscriber line
  • At full specified power, PTERM = PLINE = 20 mW, PTOT = VS × IS

In this application, VS = 12V.

Equation 3. IS = IQ + AVG |IOUT|
Equation 4. IQ = the LMH6672 quiescent current minus the output stage idle current.
Equation 5. IQ = 14.4 – 4.8 = 9.6 mA

Average (AVG) |IOUT| for a full-rate ADSL CPE application, using a 1:2 turns ratio transformer, is 20016651.gif = 28.28 mA RMS.

For a Gaussian signal, which the DMT ADSL signal approximates, AVG |IOUT| = 20016652.gif = 22.6 mA. Therefore, PTOT = (22.6 mA + 9.6 mA) × 12V = 386 mW and PDRIVER is 40 mW lower or 346 mW.

In the SOIC package, with a θJA of 172°C/W, this causes a temperature rise of 60°C. With an ambient temperature at the maximum recommended 85°C, the TJ is at 145°C, which is below the specified 150°C maximum.

Even if it is assumed that the absolute maximum IS over temperature of 18 mA, when the IQ is scaled up proportionally to 7 mA, the PDRIVER only goes up by 17 mW causing a 62°C rise from ambient to 147°C.

Although very few CPE applications will ever operate in an environment as hot as 85°C, if a lower TJ is desired or the LMH6672 is to be used in an application where the power dissipation is higher, the SO PowerPAD (DDA) package provides a much lower RθJA of only 58.6° C/W. Using the same PDRIVER as above, we find that the temperature rise is only about 21°C, resulting in TJ of 106°C with 85°C ambient.

NOTE

Since the exposed PAD (or DAP) of the SO PowerPAD (DDA) package is internally floating, the footprint for DAP could be connected to ground plane in PCB for better heat dissipation.