JAJSOI8H November   2009  – May 2022 LMP8645 , LMP8645HV

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 2.7-V Electrical Characteristics
    6. 6.6 5-V Electrical Characteristics
    7. 6.7 12-V Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Theory of Operation
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Driving ADC
      2. 7.3.2 Applying Input Voltage With No Supply Voltage
    4. 7.4 Device Functional Modes
      1. 7.4.1 Selection of the Gain Resistor
      2. 7.4.2 Gain Range Limitations
        1. 7.4.2.1 Range 1: VCM is –2 V to 1.8 V
        2. 7.4.2.2 Range 2: VCM is 1.8 V to VS
        3. 7.4.2.3 Range 3: VCM is greater than VS
      3. 7.4.3 Selection of Sense Resistor
        1. 7.4.3.1 Resistor Power Rating and Thermal Issues
        2. 7.4.3.2 Using PCB Trace as a Sense Resistor
      4. 7.4.4 Sense Line Inputs
        1. 7.4.4.1 Effects of Series Resistance on Sense Lines
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Current Monitor Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 High Brightness LED Driver
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Sense Line Inputs

The sense lines should be connected to a point on the resistor that is not shared with the main current path, as shown in Figure 7-6. For lowest drift, the amplifier must be mounted away from any heat generating devices, which may include the sense resistor. The traces should be one continuous trace of copper from the sense resistor pad to the amplifier input pin pad, and ideally on the same copper layer with minimal vias or connectors. This can be important around the sense resistor if it is generating any significant heat gradients. Vias in the sense lines should be formed from continuous plated copper and routing through mating connectors or headers should be avoided. It is better to extend the sense lines than to place the amplifier in a hostile environment.

To minimize noise pickup and thermal errors, the input traces should be treated like a high-speed differential signal pair and routed tightly together with a direct path to the input pins on the same copper layer. They do not need to be impedance matched, but should follow the same matching rules about vias, spacing and equal lengths. The input traces should be run away from noise sources, such as digital lines, switching supplies, or motor drive lines.

Remember that these input traces can contain high voltage (up to 76 V), and should have the appropriate trace routing clearances to other components, traces and layers. Because the sense traces only carry the amplifier bias current, the connecting input traces can be thin traces running close together. This can help with routing or creating the required spacings.

Note:

Due to the nature of the device topology, the positive input bias current will vary with VSENSE with an extra current approximately equivalent to VSENSE / 5 kΩ on top of the typical 12 uA bias current.

The negative input bias current is not in the feedback path and will not change over VSENSE. High or miss-matched source impedances should be avoided as this imbalance will create an additional error term over input voltage.