SNOSAG6G September   2005  – October 2015 LMV791 , LMV792

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 2.5-V Electrical Characteristics
    6. 6.6 5-V Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wide Bandwidth at Low Supply Current
      2. 7.3.2 Low Input Referred Noise and Low Input Bias Current
      3. 7.3.3 Low Supply Voltage
      4. 7.3.4 Rail-to-Rail Output and Ground Sensing
      5. 7.3.5 Shutdown Feature
      6. 7.3.6 Small Size
    4. 7.4 Device Functional Modes
      1. 7.4.1 Capacitive Load Tolerance
      2. 7.4.2 Input Capacitance and Feedback Circuit Elements
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Transimpedance Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Application Curves
      3. 8.2.3 High-Gain, Wideband Transimpedance Amplifier Using the LMV792
      4. 8.2.4 Audio Preamplifier With Bandpass Filtering
      5. 8.2.5 Sensor Interfaces
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ

6 Specifications

6.1 Absolute Maximum Ratings

See (1)(7)
MIN MAX UNIT
VIN differential ±0.3 V
Supply voltage (V+ – V) 6 V
Input/Output pin voltage V+ + 0.3 V − 0.3 V
Junction temperature(2) 150 °C
Soldering information Infrared or convection (20 sec) 235 °C
Wave soldering lead temperature (10 sec) 260 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)(3) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine model(4) ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Human Body Model is 1.5 kΩ in series with 100 pF.
(4) Machine Model is 0 Ω in series with 200 pF

6.3 Recommended Operating Conditions

MIN MAX UNIT
Temperature(1) −40 125 °C
Supply voltage (V+ – V) −40°C ≤ TJ ≤ 125°C 2 5.5 V
0°C ≤ TJ ≤ 125°C 1.8 5.5 V
(1) The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/θJA. All numbers apply for packages soldered directly onto a PCB.

6.4 Thermal Information

THERMAL METRIC(1) LMV791 LMV792 UNIT
DDC (SOT-23) DGS (VSSOP)
6 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance(2)    191.8 179.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 68.1 70.5 °C/W
RθJB Junction-to-board thermal resistance 36.9 99.7 °C/W
ψJT Junction-to-top characterization parameter 2.2 11.6 °C/W
ψJB Junction-to-board characterization parameter 36.5 98.2 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 2.5-V Electrical Characteristics

Unless otherwise specified, all limits are ensured for TJ = 25°C, V+ = 2.5 V, V = 0 V, VCM = V+/2 = VO, VEN = V+.
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
VOS Input offset voltage TJ = 25 °C 0.1 ±1.35 mV
−40°C ≤ TJ ≤ 125°C ±1.65
TC VOS Input offset voltage temperature drift LMV791(3) −1 μV/°C
LMV792(3) −1.8
IB Input bias current VCM = 1 V(4) (5) TJ = 25 °C 0.05 1 pA
−40°C ≤ TJ ≤ 85 °C 25
−40°C ≤ TJ ≤ 125 °C 100
IOS Input offset current VCM = 1 V(5) 10 fA
CMRR Common-mode rejection ratio 0 V ≤ VCM ≤ 1.4 V TJ = 25 °C 80 94 dB
−40°C ≤ TJ ≤ 125°C 75
PSRR Power supply rejection ratio 2.0V ≤ V+ ≤ 5.5V, VCM = 0 V TJ = 25 °C 80 100 dB
−40°C ≤ TJ ≤ 125°C 75
1.8 V ≤ V+ ≤ 5.5 V, VCM = 0 V 80 98
CMVR Common-mode voltage range CMRR ≥ 60 dB TJ = 25 °C −0.3 1.5 V
CMRR ≥ 55 dB −40°C ≤ TJ ≤ 125°C −0.3 1.5
AVOL Open-loop voltage gain VOUT = 0.15 V to 2.2 V,
RLOAD = 2 kΩ to V+/2
LMV791 TJ = 25 °C 85 98 dB
−40°C ≤ TJ ≤ 125°C 80
LMV792 TJ = 25 °C 82 92
−40°C ≤ TJ ≤ 125°C 78
VOUT = 0.15 V to 2.2 V,
RLOAD = 10 kΩ to V+/2
TJ = 25 °C 88 110
−40°C ≤ TJ ≤ 125°C 84
VOUT Output voltage swing high RLOAD = 2 kΩ to V+/2 TJ = 25 °C 25 75 mV from either rail
−40°C ≤ TJ ≤ 125°C 82
RLOAD = 10 kΩ to V+/2 TJ = 25 °C 20 65
−40°C ≤ TJ ≤ 125°C 71
Output voltage swing low RLOAD = 2 kΩ to V+/2 TJ = 25 °C 30 75
−40°C ≤ TJ ≤ 125°C 78
RLOAD = 10 kΩ to V+/2 TJ = 25 °C 15 65
−40°C ≤ TJ ≤ 125°C 67
IOUT Output current Sourcing to V
VIN = 200 mV(6)
TJ = 25 °C 35 47 mA
−40°C ≤ TJ ≤ 125°C 28
Sinking to V+
VIN = –200 mV(6)
TJ = 25 °C 7 15
−40°C ≤ TJ ≤ 125°C 5
IS Supply current per amplifier Enable mode
VEN ≥ 2.1 V
LMV791 TJ = 25 °C 0.95 1.3 mA
−40°C ≤ TJ ≤ 125°C 1.65
LMV792
per channel
TJ = 25 °C 1.1 1.50
−40°C ≤ TJ ≤ 125°C 1.85
Shutdown mode, VEN < 0.4
per channel
TJ = 25 °C 0.02 1 μA
−40°C ≤ TJ ≤ 125°C 5
SR Slew rate AV = +1, Rising (10% to 90%) 8.5 V/μs
AV = +1, Falling (90% to 10%) 10.5
GBW Gain bandwidth 14 MHz
en Input referred voltage noise density f = 1 kHz 6.2 nV/√Hz
in Input referred current noise density f = 1 kHz 0.01 pA/√Hz
ton Turnon time 140 ns
toff Turnoff time 1000 ns
VEN Enable pin voltage range Enable mode 2.1 2 V
Shutdown mode 0.5 0.4
IEN Enable pin input current Enable mode VEN = 2.5 V(4) 1.5 3 μA
Shutdown mode VEN = 0 V(4) 0.003 0.1
THD+N Total harmonic distortion + noise f = 1 kHz, AV = 1, RLOAD = 600 Ω 0.01%
(1) Typical values represent the parametric norm at the time of characterization.
(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the statistical quality control (SQC) method.
(3) Offset voltage average drift is determined by dividing the change in VOS by temperature change.
(4) Positive current corresponds to current flowing into the device.
(5) This parameter is specified by design and/or characterization and is not tested in production.
(6) The short circuit test is a momentary test, the short circuit duration is 1.5 ms.

6.6 5-V Electrical Characteristics

Unless otherwise specified, all limits are ensured for TJ = 25°C, V+ = 5 V, V = 0 V, VCM = V+/2 = VO, VEN = V+.
PARAMETER TEST CONDITIONS MIN(2) TYP(1) MAX(2) UNIT
VOS Input offset voltage TJ = 25 °C 0.1 ±1.35 mV
−40°C ≤ TJ ≤ 125°C ±1.65
TC VOS Input offset voltage temperature drift LMV791(3) −1 μV/°C
LMV792(3) −1.8
IB Input bias current VCM = 2 V(4) (5) TJ = 25 °C 0.1 1 pA
−40°C ≤ TJ ≤ 85°C 25
−40°C ≤ TJ ≤ 125°C 100
IOS Input offset current VCM = 2 V(5) 10 fA
CMRR Common-mode rejection ratio 0 V ≤ VCM ≤ 3.7 V TJ = 25 °C 80 100 dB
−40°C ≤ TJ ≤ 125°C 75
PSRR Power supply rejection ratio 2.0V ≤ V+ ≤ 5.5 V, VCM = 0 V TJ = 25 °C 80 100 dB
−40°C ≤ TJ ≤ 125°C 75
1.8V ≤ V+ ≤ 5.5 V, VCM = 0 V 80 98
CMVR Common-mode voltage range CMRR ≥ 60 dB TJ = 25 °C −0.3 4 V
CMRR ≥ 55 dB −40°C ≤ TJ ≤ 125°C −0.3 4
AVOL Open-loop voltage gain VOUT = 0.3V to 4.7V,
RLOAD = 2 kΩ to V+/2
LMV791 TJ = 25 °C 85 97 dB
−40°C ≤ TJ ≤ 125°C 80
LMV792 TJ = 25 °C 82 89
−40°C ≤ TJ ≤ 125°C 78
VOUT = 0.3V to 4.7V,
RLOAD = 10 kΩ to V+/2
TJ = 25 °C 88 110
−40°C ≤ TJ ≤ 125°C 84
VOUT Output voltage swing high RLOAD = 2 kΩ to V+/2 TJ = 25 °C 35 75 mV from either rail
−40°C ≤ TJ ≤ 125°C 82
RLOAD = 10 kΩ to V+/2 TJ = 25 °C 25 65
−40°C ≤ TJ ≤ 125°C 71
Output voltage swing low RLOAD = 2 kΩ to V+/2 LMV791 TJ = 25 °C 42 75
−40°C ≤ TJ ≤ 125°C 78
LMV792 TJ = 25 °C 45 80
−40°C ≤ TJ ≤ 125°C 83
RLOAD = 10 kΩ to V+/2 TJ = 25 °C 20 65
−40°C ≤ TJ ≤ 125°C 67
IOUT Output current Sourcing to V
VIN = 200 mV(6)
TJ = 25 °C 45 60 mA
−40°C ≤ TJ ≤ 125°C 37
Sinking to V+
VIN = –200 mV(6)
TJ = 25 °C 10 21
−40°C ≤ TJ ≤ 125°C 6
IS Supply current per amplifier Enable mode
VEN ≥ 4.6 V
LMV791 TJ = 25 °C 1.15 1.4 mA
−40°C ≤ TJ ≤ 125°C 1.75
LMV792
per channel
TJ = 25 °C 1.3 1.7
−40°C ≤ TJ ≤ 125°C 2.05
Shutdown mode (VEN ≤ 0.4 V) TJ = 25 °C 0.14 1 μA
−40°C ≤ TJ ≤ 125°C 5
SR Slew rate AV = +1, Rising (10% to 90%) 6 9.5 V/μs
AV = +1, Falling (90% to 10%) 7.5 11.5
GBW Gain bandwidth 17 MHz
en Input referred voltage noise density f = 1 kHz 5.8 nV/√Hz
in Input referred current noise density f = 1 kHz 0.01 pA/√Hz
ton Turnon time 110 ns
toff Turnoff time 800 ns
VEN Enable pin voltage range Enable mode 4.6 4.5 V
Shutdown mode 0.5 0.4
IEN Enable pin input current Enable mode VEN = 5 V(4) 5.6 10 μA
Shutdown mode VEN = 0 V(4) 0.005 0.2
THD+N Total harmonic distortion + noise f = 1 kHz, AV = 1, RLOAD = 600 Ω 0.01%
(1) Typical values represent the parametric norm at the time of characterization.
(2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using the statistical quality control (SQC) method.
(3) Offset voltage average drift is determined by dividing the change in VOS by temperature change.
(4) Positive current corresponds to current flowing into the device.
(5) This parameter is specified by design and/or characterization and is not tested in production.
(6) The short circuit test is a momentary test, the short circuit duration is 1.5 ms.
(7) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.

6.7 Typical Characteristics

Unless otherwise specified, TA = 25°C, V = 0, V+ = Supply Voltage = 5V, VCM = V+/2, VEN = V+.
LMV791 LMV792 20116805.gif Figure 1. Supply Current vs Supply Voltage (LMV791)
LMV791 LMV792 20116806.gif Figure 3. Supply Current vs
Supply Voltage in Shutdown Mode
LMV791 LMV792 20116851.gif Figure 5. VOS vs VCM
LMV791 LMV792 20116812.gif Figure 7. VOS vs Supply Voltage
LMV791 LMV792 20116808.gif Figure 9. Supply Current vs Enable Pin Voltage (LMV791)
LMV791 LMV792 20116882.gif Figure 11. Supply Current vs Enable Pin Voltage (LMV792)
LMV791 LMV792 20116862.gif Figure 13. Input Bias Current vs VCM
LMV791 LMV792 20116820.gif Figure 15. Sourcing Current vs Supply Voltage
LMV791 LMV792 20116850.gif Figure 17. Sourcing Current vs Output Voltage
LMV791 LMV792 20116817.gif Figure 19. Positive Output Swing vs Supply Voltage
LMV791 LMV792 20116816.gif Figure 21. Positive Output Swing vs Supply Voltage
LMV791 LMV792 20116818.gif Figure 23. Positive Output Swing vs Supply Voltage
LMV791 LMV792 20116839.gif Figure 25. Input Referred Voltage Noise vs Frequency
LMV791 LMV792 20116830.gif Figure 27. Overshoot and Undershoot vs CLOAD
LMV791 LMV792 20116804.gif Figure 29. THD+N vs Peak-to-Peak Output Voltage (VOUT)
LMV791 LMV792 20116875.gif Figure 31. THD+N vs Frequency
LMV791 LMV792 20116873.gif Figure 33. Open-Loop Gain and Phase With Resistive Load
LMV791 LMV792 20116880.gif Figure 35. Crosstalk Rejection
LMV791 LMV792 20116837.gif
AV = +1
Figure 37. Large Signal Transient Response
LMV791 LMV792 20116834.gif
AV = +1
Figure 39. Large Signal Transient Response
LMV791 LMV792 20116846.gif Figure 41. Phase Margin vs Capacitive Load (Stability)
LMV791 LMV792 20116828.gif Figure 43. Negative PSRR vs Frequency
LMV791 LMV792 20116876.gif Figure 45. Input Common-Mode Capacitance vs VCM
LMV791 LMV792 20116881.gif Figure 2. Supply Current vs Supply Voltage (LMV792)
LMV791 LMV792 20116809.gif Figure 4. VOS vs VCM
LMV791 LMV792 20116811.gif Figure 6. VOS vs VCM
LMV791 LMV792 20116829.gif Figure 8. Slew Rate vs Supply Voltage
LMV791 LMV792 20116807.gif Figure 10. Supply Current vs Enable Pin Voltage(LMV791)
LMV791 LMV792 20116883.gif Figure 12. Supply Current vs Enable Pin Voltage (LMV792)
LMV791 LMV792 20116887.gif Figure 14. Input Bias Current vs VCM
LMV791 LMV792 20116819.gif Figure 16. Sinking Current vs Supply Voltage
LMV791 LMV792 20116854.gif Figure 18. Sinking Current vs Output Voltage
LMV791 LMV792 20116815.gif Figure 20. Negative Output Swing vs Supply Voltage
LMV791 LMV792 20116814.gif Figure 22. Negative Output Swing vs Supply Voltage
LMV791 LMV792 20116813.gif Figure 24. Negative Output Swing vs Supply Voltage
LMV791 LMV792 20116831.gif Figure 26. Time Domain Voltage Noise
LMV791 LMV792 20116826.gif Figure 28. THD+N vs Peak-to-Peak Output Voltage (VOUT)
LMV791 LMV792 20116874.gif Figure 30. THD+N vs Frequency
LMV791 LMV792 20116841.gif Figure 32. Open-Loop Gain and Phase With Capacitive Load
LMV791 LMV792 20116832.gif Figure 34. Closed-Loop Output Impedance vs Frequency
LMV791 LMV792 20116838.gif
AV = +1
Figure 36. Small Signal Transient Response
LMV791 LMV792 20116833.gif
AV = +1
Figure 38. Small Signal Transient Response
LMV791 LMV792 20116845.gif Figure 40. Phase Margin vs Capacitive Load (Stability)
LMV791 LMV792 20116827.gif Figure 42. Positive PSRR vs Frequency
LMV791 LMV792 20116856.gif Figure 44. CMRR vs Frequency