JAJSEP3C September   2017  – March 2018 LMZM33603

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
    1.     概略回路図
  3. 概要
    1.     安全動作領域
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics (VIN = 5 V)
    8. 6.8 Typical Characteristics (VIN = 12 V)
    9. 6.9 Typical Characteristics (VIN = 24 V)
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Feed-Forward Capacitor, CFF
      3. 7.3.3  Output Current vs Output Voltage
      4. 7.3.4  Voltage Dropout
      5. 7.3.5  Switching Frequency (RT)
      6. 7.3.6  Synchronization (SYNC)
      7. 7.3.7  Input Capacitors
      8. 7.3.8  Output Capacitors
      9. 7.3.9  Output On/Off Enable (EN)
      10. 7.3.10 Programmable Undervoltage Lockout (UVLO)
      11. 7.3.11 Power Good (PGOOD)
      12. 7.3.12 Overcurrent Protection (OCP)
      13. 7.3.13 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Shutdown Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Feed-Forward Capacitor (CFF)
        4. 8.2.2.4 Setting the Switching Frequency
        5. 8.2.2.5 Input Capacitors
        6. 8.2.2.6 Output Capacitor Selection
        7. 8.2.2.7 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Theta JA vs PCB Area
    4. 10.4 EMI
      1. 10.4.1 EMI Plots
    5. 10.5 Package Specifications
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
    2. 11.2 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

Over –40°C to +105°C ambient temperature, VIN = 24 V, VOUT = 5 V, IOUT = IOUT maximum, fsw = 450 kHz (unless otherwise noted); CIN1 = 2 × 4.7-µF, 50-V, 1210 ceramic; CIN2 = 100-µF, 50-V, electrolytic; COUT = 4 × 22-µF, 25-V, 1210 ceramic. Minimum and maximum limits are specified through production test or by design. Typical values represent the most likely parametric norm and are provided for reference only.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE (VIN)
VIN Input voltage Over IOUT range 4(1) 36 V
UVLO VIN undervoltage lockout VIN increasing 3.3 3.6 3.9 V
VIN decreasing 3 3.3 3.5 V
ISHDN Shutdown supply current VEN = 0 V, VIN = 12 V 2 4 µA
OUTPUT VOLTAGE (VOUT)
VOUT(ADJ) Output voltage adjust Over IOUT range 1 13.5(3) V
IOUT ≤ 2 A 1 18(3) V
VOUT(Ripple) Output voltage ripple 20-MHz bandwidth 10 mV
FEEDBACK
VFB Feedback voltage(2) TA = 25°C, IOUT = 0 A 0.985 1 1.015 V
Over VIN range, –40°C ≤ TJ ≤ 125°C, IOUT = 0 A 0.98 1 1.02 V
Load regulation Over IOUT range, TA = 25°C 0.04%
IFB Feedback leakage current VFB = 1 V 10 nA
CURRENT
IOUT Output current Natural convection, TA = 25°C 0 3 A
Overcurrent threshold 4 A
PERFORMANCE
ƞ Efficiency VIN = 24 V,
IOUT = 1.5 A
VOUT = 12 V, fSW = 900 kHz 94%
VOUT = 5 V, fSW = 450 kHz 90%
VOUT = 3.3 V, fSW = 300 kHz 87%
VIN = 12 V,
IOUT = 1.5 A
VOUT = 5 V, fSW = 450 kHz 92%
VOUT = 3.3 V, fSW = 300 kHz 89%
VOUT = 2.5 V, fSW = 250 kHz 87%
Transient response 25% to 75% load step
1 A/µs slew rate
Over/undershoot 130 mV
Recovery Time 60 µs
SOFT START
TSS Internal soft start time 6 ms
THERMAL
TSHDN Thermal shutdown Shutdown temperature 170 °C
Hysteresis 10 15 °C
ENABLE (EN)
VEN-H EN rising threshold 1.4 1.55 1.7 V
VEN-HYS EN hysteresis voltage 0.4 V
IEN EN Input leakage current VIN = 4 V to 36 V, VEN = 2 V 10 100 nA
VIN = 4 V to 36 V, VEN = 36 V 1 µA
POWER GOOD (PGOOD)
VPGOOD PGOOD thresholds VOUT rising (good) 92% 94% 96.5%
VOUT rising (fault) 104% 107% 110%
VOUT falling hysteresis 1.5%
Minimum VIN for valid PGOOD 50-μA pullup, VEN = 0 V, TA = 25°C 1.5 V
PGOOD low voltage 0.5-mA pullup, VEN = 0 V 0.4 V
CAPACITANCE
CIN External input capacitance Ceramic type 9.4(4) µF
Non-ceramic type 47(4) µF
COUT External output capacitance min(5) max(6) µF
See Voltage Dropout for information on voltage dropout.
The overall output voltage tolerance will be affected by the tolerance of the external RFBT and RFBB resistors.
The maximum output voltage varies depending on the output current (see Output Current vs Output Voltage).
A minimum of 9.4 µF (2 × 4.7 µF) ceramic input capacitance is required for proper operation. An additional 47 µF of bulk capacitance is recommended for applications with transient load requirements. See the Input Capacitors section of the datasheet for further guidance.
The minimum amount of required output capacitance varies depending on the output voltage (see Output Capacitor Selection). A minimum amount of ceramic output capacitance is required. Locate the capacitance close to the device. Adding additional ceramic or non-ceramic capacitance close to the load improves the response of the regulator to load transients.
The maximum allowable output capacitance varies depending on the output voltage (see Output Capacitor Selection).