JAJSQK8F april   2000  – july 2023 LP2980-ADJ

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Enable
      2. 7.3.2 Dropout Voltage
      3. 7.3.3 Current Limit
      4. 7.3.4 Undervoltage Lockout (UVLO)
      5. 7.3.5 Output Pulldown
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Feedback Resistors
      2. 8.1.2 Recommended Capacitor Types
        1. 8.1.2.1 Recommended Capacitors for the New Chip
        2. 8.1.2.2 Recommended Capacitors for the Legacy Chip
      3. 8.1.3 Input and Output Capacitor Requirements
      4. 8.1.4 Feed-Forward Capacitor (CFF)
      5. 8.1.5 Reverse Current
      6. 8.1.6 Power Dissipation (PD)
      7. 8.1.7 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting VOUT For the LP2980-ADJ LDO
        2. 8.2.2.2 ON/OFF Input Operation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Recommended Capacitors for the Legacy Chip

The ESR of a good-quality tantalum capacitor is almost directly centered in the middle of the stable range of the ESR curve (approximately 0.5 Ω–1 Ω). The temperature stability of tantalum capacitors is typically very good, with a total variation of only approximately 2:1 over the temperature range of –40°C to +125°C (ESR increases at colder temperatures). Avoid off-brand capacitors because some poor-quality tantalum capacitors are available with ESR values greater than 10 Ω, which usually causes oscillation problems. One caution regarding tantalum capacitors is that if used on the input, the ESR is low enough to be destroyed by a surge current if the capacitor is powered up from a low impedance source (such as a battery) that has no limit on inrush current. In this case, use a ceramic input capacitor that does not have this problem.

Ceramic capacitors are generally larger and more costly than tantalum capacitors for a given amount of capacitance. These capacitors also have a very low ESR that is quite stable with temperature. However, the ESR of a ceramic capacitor is typically low enough to make an LDO oscillate. A 2.2-μF ceramic demonstrated an ESR of approximately 15 mΩ when tested. If used as an output capacitor, this ESR can cause instability (see the ESR curves in the Typical Characteristics section). If a ceramic capacitor is used on the output of an LDO, place a small resistor (approximately 1 Ω) in series with the capacitor. If used as an input capacitor, no resistor is needed because there is no requirement for ESR on capacitors used on the input.