JAJSDV4J June 2009 – January 2017 OMAP-L138
PRODUCTION DATA.
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BYTE ADDRESS | ACRONYM | REGISTER DESCRIPTION | COMMENTS |
---|---|---|---|
0x01E1 0000 | PID | Peripheral Identification Register | |
0x01E1 0004 | PWREMU_MGMT | HPI power and emulation management register | The CPU has read/write access to the PWREMU_MGMT register. |
0x01E1 0008 | - | Reserved | |
0x01E1 000C | GPIO_EN | General Purpose IO Enable Register | |
0x01E1 0010 | GPIO_DIR1 | General Purpose IO Direction Register 1 | |
0x01E1 0014 | GPIO_DAT1 | General Purpose IO Data Register 1 | |
0x01E1 0018 | GPIO_DIR2 | General Purpose IO Direction Register 2 | |
0x01E1 001C | GPIO_DAT2 | General Purpose IO Data Register 2 | |
0x01E1 0020 | GPIO_DIR3 | General Purpose IO Direction Register 3 | |
0x01E1 0024 | GPIO_DAT3 | General Purpose IO Data Register 3 | |
01E1 0028 | - | Reserved | |
01E1 002C | - | Reserved | |
01E1 0030 | HPIC | HPI control register | The Host and the CPU both have read/write access to the HPIC register. |
01E1 0034 | HPIA
(HPIAW)(1) |
HPI address register (Write) | The Host has read/write access to the HPIA registers. The CPU has only read access to the HPIA registers. |
01E1 0038 | HPIA
(HPIAR)(1) |
HPI address register (Read) | |
01E1 000C - 01E1 07FF | - | Reserved |