JAJSDV4J June 2009 – January 2017 OMAP-L138
PRODUCTION DATA.
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BYTE ADDRESS | ACRONYM | REGISTER DESCRIPTION |
---|---|---|
0x01E1 7000 | PID | Peripheral identification register |
0x01E1 7004 | CH0_CTRL | Channel 0 control register |
0x01E1 7008 | CH1_CTRL | Channel 1 control register |
0x01E1 700C | CH2_CTRL | Channel 2 control register |
0x01E1 7010 | CH3_CTRL | Channel 3 control register |
0x01E1 7014 - 0x01E1 701F | - | Reserved |
0x01E1 7020 | INTEN | Interrupt enable |
0x01E1 7024 | INTENSET | Interrupt enable set |
0x01E1 7028 | INTENCLR | Interrupt enable clear |
0x01E1 702C | INTSTAT | Interrupt status |
0x01E1 7030 | INTSTATCLR | Interrupt status clear |
0x01E1 7034 | EMU_CTRL | Emulation control |
0x01E1 7038 | DMA_SIZE | DMA size control |
0x01E1 703C - 0x01E1 703F | - | Reserved |
CAPTURE CHANNEL 0 REGISTERS | ||
0x01E1 7040 | CH0_TY_STRTADR | Channel 0 Top Field luma buffer start address |
0x01E1 7044 | CH0_BY_STRTADR | Channel 0 Bottom Field luma buffer start address |
0x01E1 7048 | CH0_TC_STRTADR | Channel 0 Top Field chroma buffer start address |
0x01E1 704C | CH0_BC_STRTADR | Channel 0 Bottom Field chroma buffer start address |
0x01E1 7050 | CH0_THA_STRTADR | Channel 0 Top Field horizontal ancillary data buffer start address |
0x01E1 7054 | CH0_BHA_STRTADR | Channel 0 Bottom Field horizontal ancillary data buffer start address |
0x01E1 7058 | CH0_TVA_STRTADR | Channel 0 Top Field vertical ancillary data buffer start address |
0x01E1 705C | CH0_BVA_STRTADR | Channel 0 Bottom Field vertical ancillary data buffer start address |
0x01E1 7060 | CH0_SUBPIC_CFG | Channel 0 sub-picture configuration |
0x01E1 7064 | CH0_IMG_ADD_OFST | Channel 0 image data address offset |
0x01E1 7068 | CH0_HA_ADD_OFST | Channel 0 horizontal ancillary data address offset |
0x01E1 706C | CH0_HSIZE_CFG | Channel 0 horizontal data size configuration |
0x01E1 7070 | CH0_VSIZE_CFG0 | Channel 0 vertical data size configuration (0) |
0x01E1 7074 | CH0_VSIZE_CFG1 | Channel 0 vertical data size configuration (1) |
0x01E1 7078 | CH0_VSIZE_CFG2 | Channel 0 vertical data size configuration (2) |
0x01E1 707C | CH0_VSIZE | Channel 0 vertical image size |
CAPTURE CHANNEL 1 REGISTERS | ||
0x01E1 7080 | CH1_TY_STRTADR | Channel 1 Top Field luma buffer start address |
0x01E1 7084 | CH1_BY_STRTADR | Channel 1 Bottom Field luma buffer start address |
0x01E1 7088 | CH1_TC_STRTADR | Channel 1 Top Field chroma buffer start address |
0x01E1 708C | CH1_BC_STRTADR | Channel 1 Bottom Field chroma buffer start address |
0x01E1 7090 | CH1_THA_STRTADR | Channel 1 Top Field horizontal ancillary data buffer start address |
0x01E1 7094 | CH1_BHA_STRTADR | Channel 1 Bottom Field horizontal ancillary data buffer start address |
0x01E1 7098 | CH1_TVA_STRTADR | Channel 1 Top Field vertical ancillary data buffer start address |
0x01E1 709C | CH1_BVA_STRTADR | Channel 1 Bottom Field vertical ancillary data buffer start address |
0x01E1 70A0 | CH1_SUBPIC_CFG | Channel 1 sub-picture configuration |
0x01E1 70A4 | CH1_IMG_ADD_OFST | Channel 1 image data address offset |
0x01E1 70A8 | CH1_HA_ADD_OFST | Channel 1 horizontal ancillary data address offset |
0x01E1 70AC | CH1_HSIZE_CFG | Channel 1 horizontal data size configuration |
0x01E1 70B0 | CH1_VSIZE_CFG0 | Channel 1 vertical data size configuration (0) |
0x01E1 70B4 | CH1_VSIZE_CFG1 | Channel 1 vertical data size configuration (1) |
0x01E1 70B8 | CH1_VSIZE_CFG2 | Channel 1 vertical data size configuration (2) |
0x01E1 70BC | CH1_VSIZE | Channel 1 vertical image size |
DISPLAY CHANNEL 2 REGISTERS | ||
0x01E1 70C0 | CH2_TY_STRTADR | Channel 2 Top Field luma buffer start address |
0x01E1 70C4 | CH2_BY_STRTADR | Channel 2 Bottom Field luma buffer start address |
0x01E1 70C8 | CH2_TC_STRTADR | Channel 2 Top Field chroma buffer start address |
0x01E1 70CC | CH2_BC_STRTADR | Channel 2 Bottom Field chroma buffer start address |
0x01E1 70D0 | CH2_THA_STRTADR | Channel 2 Top Field horizontal ancillary data buffer start address |
0x01E1 70D4 | CH2_BHA_STRTADR | Channel 2 Bottom Field horizontal ancillary data buffer start address |
0x01E1 70D8 | CH2_TVA_STRTADR | Channel 2 Top Field vertical ancillary data buffer start address |
0x01E1 70DC | CH2_BVA_STRTADR | Channel 2 Bottom Field vertical ancillary data buffer start address |
0x01E1 70E0 | CH2_SUBPIC_CFG | Channel 2 sub-picture configuration |
0x01E1 70E4 | CH2_IMG_ADD_OFST | Channel 2 image data address offset |
0x01E1 70E8 | CH2_HA_ADD_OFST | Channel 2 horizontal ancillary data address offset |
0x01E1 70EC | CH2_HSIZE_CFG | Channel 2 horizontal data size configuration |
0x01E1 70F0 | CH2_VSIZE_CFG0 | Channel 2 vertical data size configuration (0) |
0x01E1 70F4 | CH2_VSIZE_CFG1 | Channel 2 vertical data size configuration (1) |
0x01E1 70F8 | CH2_VSIZE_CFG2 | Channel 2 vertical data size configuration (2) |
0x01E1 70FC | CH2_VSIZE | Channel 2 vertical image size |
0x01E1 7100 | CH2_THA_STRTPOS | Channel 2 Top Field horizontal ancillary data insertion start position |
0x01E1 7104 | CH2_THA_SIZE | Channel 2 Top Field horizontal ancillary data size |
0x01E1 7108 | CH2_BHA_STRTPOS | Channel 2 Bottom Field horizontal ancillary data insertion start position |
0x01E1 710C | CH2_BHA_SIZE | Channel 2 Bottom Field horizontal ancillary data size |
0x01E1 7110 | CH2_TVA_STRTPOS | Channel 2 Top Field vertical ancillary data insertion start position |
0x01E1 7114 | CH2_TVA_SIZE | Channel 2 Top Field vertical ancillary data size |
0x01E1 7118 | CH2_BVA_STRTPOS | Channel 2 Bottom Field vertical ancillary data insertion start position |
0x01E1 711C | CH2_BVA_SIZE | Channel 2 Bottom Field vertical ancillary data size |
0x01E1 7120 - 0x01E1 713F | - | Reserved |
DISPLAY CHANNEL 3 REGISTERS | ||
0x01E1 7140 | CH3_TY_STRTADR | Channel 3 Field 0 luma buffer start address |
0x01E1 7144 | CH3_BY_STRTADR | Channel 3 Field 1 luma buffer start address |
0x01E1 7148 | CH3_TC_STRTADR | Channel 3 Field 0 chroma buffer start address |
0x01E1 714C | CH3_BC_STRTADR | Channel 3 Field 1 chroma buffer start address |
0x01E1 7150 | CH3_THA_STRTADR | Channel 3 Field 0 horizontal ancillary data buffer start address |
0x01E1 7154 | CH3_BHA_STRTADR | Channel 3 Field 1 horizontal ancillary data buffer start address |
0x01E1 7158 | CH3_TVA_STRTADR | Channel 3 Field 0 vertical ancillary data buffer start address |
0x01E1 715C | CH3_BVA_STRTADR | Channel 3 Field 1 vertical ancillary data buffer start address |
0x01E1 7160 | CH3_SUBPIC_CFG | Channel 3 sub-picture configuration |
0x01E1 7164 | CH3_IMG_ADD_OFST | Channel 3 image data address offset |
0x01E1 7168 | CH3_HA_ADD_OFST | Channel 3 horizontal ancillary data address offset |
0x01E1 716C | CH3_HSIZE_CFG | Channel 3 horizontal data size configuration |
0x01E1 7170 | CH3_VSIZE_CFG0 | Channel 3 vertical data size configuration (0) |
0x01E1 7174 | CH3_VSIZE_CFG1 | Channel 3 vertical data size configuration (1) |
0x01E1 7178 | CH3_VSIZE_CFG2 | Channel 3 vertical data size configuration (2) |
0x01E1 717C | CH3_VSIZE | Channel 3 vertical image size |
0x01E1 7180 | CH3_THA_STRTPOS | Channel 3 Top Field horizontal ancillary data insertion start position |
0x01E1 7184 | CH3_THA_SIZE | Channel 3 Top Field horizontal ancillary data size |
0x01E1 7188 | CH3_BHA_STRTPOS | Channel 3 Bottom Field horizontal ancillary data insertion start position |
0x01E1 718C | CH3_BHA_SIZE | Channel 3 Bottom Field horizontal ancillary data size |
0x01E1 7190 | CH3_TVA_STRTPOS | Channel 3 Top Field vertical ancillary data insertion start position |
0x01E1 7194 | CH3_TVA_SIZE | Channel 3 Top Field vertical ancillary data size |
0x01E1 7198 | CH3_BVA_STRTPOS | Channel 3 Bottom Field vertical ancillary data insertion start position |
0x01E1 719C | CH3_BVA_SIZE | Channel 3 Bottom Field vertical ancillary data size |
0x01E1 71A0 - 0x01E1 71FF | - | Reserved |