JAJSGT8F June   2010  – March 2023 OPA140 , OPA2140 , OPA4140

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA140
    5. 6.5 Thermal Information: OPA2140
    6. 6.6 Thermal Information: OPA4140
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Operating Voltage
      2. 7.3.2  Capacitive Load and Stability
      3. 7.3.3  Output Current Limit
      4. 7.3.4  Noise Performance
      5. 7.3.5  Basic Noise Calculations
      6. 7.3.6  Phase-Reversal Protection
      7. 7.3.7  Thermal Protection
      8. 7.3.8  Electrical Overstress
      9. 7.3.9  EMI Rejection
      10. 7.3.10 EMIRR +IN Test Configuration
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 9.1.1.3 フィルタ設計ツール
        4. 9.1.1.4 TI のリファレンス・デザイン
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TA = 25°C, VS = ±18 V, RL = 2 kΩ connected to midsupply, and VCM = VOUT = midsupply (unless otherwise noted)

Table 6-1 Table of Graphs
DESCRIPTION FIGURE
Offset Voltage Production Distribution Figure 6-1
Offset Voltage Drift Distribution Figure 6-2
Offset Voltage vs Common-Mode Voltage (Maximum Supply) Figure 6-3
Input Offset Voltage vs Temperature Figure 6-4
IB vs Common-Mode Voltage Figure 6-5
Output Voltage Swing vs Output Current Figure 6-6
CMRR and PSRR vs Frequency (RTI) Figure 6-7
Common-Mode Rejection Ratio vs Temperature Figure 6-8
0.1-Hz to 10-Hz Noise Figure 6-9
Input Voltage Noise Density vs Frequency Figure 6-10
THD+N Ratio vs Frequency (80-kHz AP Bandwidth) Figure 6-11
THD+N Ratio vs Output Amplitude Figure 6-12
Quiescent Current vs Temperature Figure 6-13
Quiescent Current vs Supply Voltage Figure 6-14
Gain and Phase vs Frequency Figure 6-15
Closed-Loop Gain vs Frequency Figure 6-16
Open-Loop Gain vs Temperature Figure 6-17
Open-Loop Output Impedance vs Frequency Figure 6-18
Small-Signal Overshoot vs Capacitive Load (G = 1) Figure 6-19
Small-Signal Overshoot vs Capacitive Load (G = –1) Figure 6-20
No Phase Reversal Figure 6-21
Maximum Output Voltage vs Frequency Figure 6-22
Positive Overload Recovery Figure 6-23
Negative Overload Recovery Figure 6-24
Large-Signal Positive and Negative Settling Time Figure 6-25,
Figure 6-26
Small-Signal Step Response (G = 1) Figure 6-27
Small-Signal Step Response (G = –1) Figure 6-28
Large-Signal Step Response (G = 1) Figure 6-29
Large-Signal Step Response (G = –1) Figure 6-30
Short-Circuit Current vs Temperature Figure 6-31
Channel Separation vs Frequency Figure 6-32
GUID-9742769D-FB81-4425-80EE-328EE30CA998-low.gif
 
Figure 6-1 Offset Voltage Production Distribution
GUID-DAD963BE-4AE4-45B3-B1D8-C95DA5B6E30C-low.gif
 
Figure 6-3 Offset Voltage vs Common-Mode Voltage
GUID-1E42F85A-3C75-4012-9E39-3879532207CC-low.gif
 
Figure 6-5 IB vs Common-Mode Voltage
GUID-03F909C5-B520-4DA1-82D3-7B47C7A439AF-low.gif
 
Figure 6-7 CMRR and PSRR vs Frequency (Referred to Input)
GUID-E2C4AFAA-FC4F-48FA-B5ED-EC8AB312D8B6-low.gif
 
Figure 6-9 0.1-Hz to 10-Hz Noise
GUID-063A3B18-4DE8-432A-906D-1CCCB7372A00-low.gif
 
Figure 6-11 THD+N Ratio vs Frequency
GUID-B70AA0A9-D896-4D5B-B144-DCC24AAED05C-low.gif
 
Figure 6-13 Quiescent Current vs Temperature
GUID-BDD1A712-C16B-474C-8406-F48731CA1B33-low.gif
 
Figure 6-15 Gain and Phase vs Frequency
GUID-26CB58F9-C217-4DC0-881C-D81FE38F3129-low.gif
 
Figure 6-17 Open-Loop Gain vs Temperature
GUID-64990BDF-A4FA-4925-863E-6BD89C45555F-low.gif
 
Figure 6-19 Small-Signal Overshoot vs Capacitive Load (100‑mV Output Step)
GUID-216ADA14-8682-4649-AA4B-21BBF88051E4-low.gif
 
 
Figure 6-21 No Phase Reversal
GUID-CE733826-422E-48E5-9936-2A668BDD0703-low.gif
 
Figure 6-23 Positive Overload Recovery
GUID-961A9751-CD09-4CF5-810F-3AEABA26BEB5-low.gif
 
Figure 6-25 Large-Signal Positive Settling Time (10-V Step)
GUID-36423577-BFE2-4AF9-8C6E-4931117B12BF-low.gif
 
Figure 6-27 Small-Signal Step Response (100 mV)
GUID-5ACE4AE9-063F-441B-BBCD-486B6487338A-low.gif
 
Figure 6-29 Large-Signal Step Response
GUID-862EC999-EC92-474D-955B-49045B803D79-low.gif
 
Figure 6-31 Short Circuit Current vs Temperature
GUID-7CE41CF4-602F-48DB-9AEA-14E2139E57C8-low.gif
 
Figure 6-2 Offset Voltage Drift Distribution
GUID-CF4591C3-2F67-4E22-9B23-8A5A9D30ED38-low.gif
 
Figure 6-4 Input Offset Voltage vs Temperature (144 Amplifiers)
GUID-E7D2D6BF-134F-4A4C-9B28-A394C45A79BE-low.gif
 
Figure 6-6 Output Voltage Swing vs Output Current (Maximum Supply)
GUID-D73A65DE-3AA9-4CD4-BFAF-BAB188CC1DFC-low.gif
 
Figure 6-8 Common-Mode Rejection Ratio vs Temperature
GUID-3932E124-D535-4917-9B1F-CED81039E226-low.gif
 
Figure 6-10 Input Voltage Noise Density vs Frequency
GUID-681A102F-16FC-4DE4-9E28-5E11344111F6-low.gif
 
Figure 6-12 THD+N Ratio vs Output Amplitude
GUID-0BA6B2F4-02D5-4A4C-9575-5B04D6566304-low.gif
 
Figure 6-14 Quiescent Current vs Supply Voltage
GUID-E63A8EA5-2E1A-46C4-BC63-0A821F23C3CF-low.gif
 
Figure 6-16 Closed-Loop Gain vs Frequency
GUID-ED6294EE-6694-4802-A4E2-276ED6005CA9-low.gif
 
Figure 6-18 Open-Loop Output Impedance vs Frequency
GUID-EEA14E52-68EB-46B7-8F5F-6F0CBEA9AC18-low.gif
 
Figure 6-20 Small-Signal Overshoot vs Capacitive Load (100‑mV Output Step)
GUID-3AC1676E-9B03-44B9-9D6B-433AB4C7F6B5-low.gif
 
Figure 6-22 Maximum Output Voltage vs Frequency
GUID-38E21B24-BFCA-42D0-B227-63169D1C657E-low.gif
 
Figure 6-24 Negative Overload Recovery
GUID-05E5C361-A682-414D-9584-C88BFAD54F34-low.gif
 
Figure 6-26 Large-Signal Negative Settling Time (10-V Step)
GUID-83EC2761-3F60-40BB-A4B2-01513F029F07-low.gif
 
Figure 6-28 Small-Signal Step Response (100 mV)
GUID-4A9A954F-A324-4384-821F-20D805ECDC66-low.gif
 
Figure 6-30 Large-Signal Step Response
GUID-B54CF75D-FF5D-4121-9AFB-7C4FD4CF5D12-low.gif
 
Figure 6-32 Channel Separation vs Frequency