JAJSCZ4E January   2017  – December 2022 OPA1677 , OPA1678 , OPA1679

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA1677
    5. 6.5 Thermal Information: OPA1678
    6. 6.6 Thermal Information: OPA1679
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Phase Reversal Protection
      2. 7.3.2 Electrical Overstress
      3. 7.3.3 EMI Rejection Ratio (EMIRR)
        1. 7.3.3.1 EMIRR IN+ Test Configuration
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operating Voltage
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Capacitive Loads
    2. 8.2 Typical Applications
      1. 8.2.1 Phantom-Powered Preamplifier for Piezo Contact Microphones
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Power Supply
          2. 8.2.1.2.2 Input Network
          3. 8.2.1.2.3 Gain
          4. 8.2.1.2.4 Output Network
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Phono Preamplifier for Moving Magnet Cartridges
      3. 8.2.3 Single-Supply Electret Microphone Preamplifier
      4. 8.2.4 Composite Headphone Amplifier
      5. 8.2.5 Differential Line Receiver With AC-Coupled Outputs
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Power Dissipation
      2. 8.4.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 9.1.1.3 DIP アダプタ評価基板
        4. 9.1.1.4 DIYAMP-EVM
        5. 9.1.1.5 TI のリファレンス・デザイン
        6. 9.1.1.6 フィルタ設計ツール
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

EMIRR IN+ Test Configuration

Figure 7-4 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the operational amplifier noninverting input pin using a transmission line. The operational amplifier is configured in a unity-gain buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). A large impedance mismatch at the operational amplifier input causes a voltage reflection; however, this effect is characterized and accounted for when determining the EMIRR IN+. The resulting dc offset voltage is sampled and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that can interfere with multimeter accuracy. See the EMI Rejection Ratio of Operational Amplifiers application report for more details.

GUID-A930EC43-928F-4266-A3DD-F67C81E7E1ED-low.gif Figure 7-4 EMIRR IN+ Test Configuration Schematic