SBOS940A May   2019  – March 2020 OPA818

PRODUCTION DATA.  

  1. Features
  2. Applications
    1.     High-Speed Optical Front-End
  3. Description
    1.     Photodiode Capacitance vs 3-dB Bandwidth
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: VS = ±5 V
    6. 7.6 Typical Characteristics: VS = ±5 V
    7. 7.7 Typical Characteristics: VS = 6 V
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 8.3.4 Low Input Capacitance
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 8.4.2 Single-Supply Operation (6 V to 13 V)
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Wideband, Non-Inverting Operation
      2. 9.1.2 Wideband, Transimpedance Design Using OPA818
    2. 9.2 Typical Applications
      1. 9.2.1 High Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Non-Inverting Gain of 2 V/V
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Thermal Considerations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Non-Inverting Gain of 2 V/V

The OPA818 is normally stable in noise gain configurations of greater than 7 V/V when conventional feedback networks are used. The OPA818 can be configured in noise gains of less than 7 V/V by using capacitors in the feedback path and between the inputs to maintain the desired gain at lower frequencies and increase the noise gain at higher frequencies such that the amplifier is stable. Configuration (a) in Figure 55 shows OPA818 configured in a gain of 2 V/V by using capacitors and resistors to shape the noise gain and achieve a phase margin of approximately 51° that is very close to the phase margin achieved for the conventional 7 V/V configuration (b) in Figure 55.

The key benefit of using a decompensated amplifier such as the OPA818 below the minimum stable gain allows taking advantage of the low noise and low distortion performance at powers lower than comparable unity-gain stable architectures. The small-signal frequency response in Figure 55 shows flat AC performance beyond 100 MHz for gain of 2 V/V configuration (a) in Figure 57, and by being in a lower gain configuration versus the minimum stable gain configuration of 7 V/V, the output-referred total noise is also lower (64 nV/√Hz at 100 MHz) as shown in Figure 57 compared to that at 166 nV/√Hz of configuration (b). By reducing the 10-pF input capacitor, higher closed-loop bandwidth can be achieved at the expense of increased peaking and reduced phase margin. Low-capacitance layout by minimizing trace lengths and removing planes under the traces and components connected to the inverting input is critical to minimize parasitic capacitance (see Layout Guidelines). As small as 1 to 2 pF of parasitic capacitance on inverting input will require tweaking the noise-shaping component values to get flat frequency response and the desired phase margin. Configurations in Figure 55 does not take into account this parasitic capacitance but it must be considered for practical purposes. A 45° phase margin is generally acceptable but anything below 40° is not recommended to allow for component, PCB, and process tolerances. Details on the benefits of decompensated architectures are discussed in Using a decompensated op amp for improved performance.

OPA818 SBOS940_OPA818_Apps_G=2-Typ.gifFigure 55. Non-Inverting Gain of 2 V/V and 7 V/V Configurations
OPA818 D107_Apps_G=2,7_SSFR.gif
Figure 56. Small-Signal Frequency Response in Gains of
2 V/V and 7 V/V Configurations of Figure 55
OPA818 D108_Apps_G=2,7_Noise.gif
Figure 57. Output Noise in Gains of 2 V/V and 7 V/V Configurations of Figure 55