JAJSJX2 October   2020 OPA856

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
    7. 7.7 Typical Characteristics (continued)
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 Wide Gain-Bandwidth Product
      4. 8.3.4 Slew Rate and Output Stage
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply and Single-Supply Operation
      2. 8.4.2 Power-Down Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 サポート・リソース
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

at VS+ = 5 V, VS– = 0 V, G = 1 V/V, RF = 0 Ω, input common-mode biased at midsupply, RL = 200 Ω, output load is referenced to midsupply, and TA = 25℃ (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
SSBW Small-signal bandwidth VOUT = 100 mVPP 1.1 GHz
LSBW Large-signal bandwidth VOUT = 2 VPP 110 MHz
GBWP Gain-bandwidth product 1.08 GHz
Bandwdith for 0.1-dB flatness VOUT = 100 mVPP 175 MHz
SR Slew rate (10%-90%) VOUT = 2-V step 350 V/µs
tr Rise time VOUT = 100-mV step 0.75 ns
tf Fall time VOUT = 100-mV step 0.75 ns
Settling time to 0.1% VOUT = 2-V step 7 ns
HD2 Second-order harmonic distortion f = 10 MHz, VOUT = 2 VPP 85 dBc
f = 50 MHz, VOUT = 2 VPP 50
HD3 Third-order harmonic distortion f = 10 MHz, VOUT = 2 VPP 95 dBc
f = 50 MHz, VOUT = 2 VPP 45
en Input-referred voltage noise f = 1 MHz 0.9 nV/√Hz
ei Input-referred current noise f = 1 MHz 2.5 pA/√Hz
zO Closed-loop output impedance f = 1 MHz 0.15 Ω
DC PERFORMANCE
AOL Open-loop voltage gain 70 76 dB
VOS Input offset voltage TA = 25°C –1.5 ±0.2 1.5 mV
ΔVOS/ΔT Input offset voltage drift TA = –40°C to 125°C 0.7 µV/°C
IB Input bias current (1) TA = 25°C –20 –15 –5 µA
ΔIB/ΔT Input bias current drift TA = –40°C to +125°C -0.1 µA/°C
IBOS Input offset current TA = 25°C –1 ±0.1 1 µA
ΔIBOS/ΔT Input offset current drift TA = –40°C to +125°C 0.75 nA/°C
CMRR Common-mode rejection ratio VCM = ±0.5 V referred to midsupply 90 106 dB
INPUT
CCM Common-mode input capacitance 0.4 pF
CDIFF Differential input capacitance 0.7 pF
VIH Common-mode input range (high) CMRR > 80 dB, VS+ = 3.3 V 2.7 2.9 V
VIL Common-mode input range (low) CMRR > 80 dB, VS+ = 3.3 V 1.1 1.3 V
VIH Common-mode input range (high) CMRR > 80 dB 4.4 4.6 V
VIH Common-mode input range (high) TA = –40°C to +125 °C, CMRR > 80 dB 4.3 V
VIL Common-mode input range (low) CMRR > 80 dB 1.1 1.3 V
VIL Common-mode input range (low) TA = –40°C to +125°C, CMRR > 80 dB 1.3 V
OUTPUT
VOH Output voltage (high)(2) TA = 25°C, VS+ = 3.3 V 2.35 2.4 V
VOH Output voltage (high)(2) TA = 25°C 3.95 4.1 V
TA = –40°C to +125°C 4
VOL Output voltage (low)(2) TA = 25°C, VS+ = 3.3 V 1.05 1.15 V
VOL Output voltage (low)(2) TA = 25°C 1.05 1.15 V
TA = –40°C to +125°C 1.1
IO_LIN Linear output drive (sink and source) RL = 10 Ω, AOL > 60 dB 65 80 mA
TA = –40°C to +125°C, RL = 10 Ω, AOL > 60 dB 65
ISC Output short-circuit current 85 105 mA
POWER SUPPLY
IQ Quiescent current 15.4 17.2 19.5 mA
TA = –40°C 15.5
TA = 125°C 19.5
PSRR+ Positive power-supply rejection ratio 80 86 dB
PSRR– Negative power-supply rejection ratio 70 80
POWER DOWN
Disable voltage threshold Amplifier OFF below this voltage 0.65 1 V
Enable voltage threshold Amplifier ON above this voltage 1.5 1.8 V
Power-down quiescent current 70 85 μA
PD bias current 70 85 μA
Turnon time delay Time to VOUT = 90% of final value 15 ns
Turnoff time delay 250 ns
Current flowing into the input pin is considered negative.
Amplifier output saturated.