JAJSHS5C August   2019  – August 2020 OPA862

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = ±2.5 V to ±5 V
    6. 6.6 Typical Characteristics: VS = ±5 V
    7. 6.7 Typical Characteristics: VS = ±2.5 V
    8. 6.8 Typical Characteristics: VS = 1.9 V, –1.4 V
    9. 6.9 Typical Characteristics: VS = 1.9 V, –1.4 V to ±5 V
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Anti-Phase Reversal Protection
      3. 7.3.3 Precision and Low Noise
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (±1.5 V to ±6.3 V)
      2. 7.4.2 Single-Supply Operation (3 V to 12.6 V)
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single-Ended-to-Differential Gain of 4 V/V
    2. 8.2 Typical Applications
      1. 8.2.1 Single-Ended to Differential with 2.5-V Output Common-Mode Voltage
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Transimpedance Amplifier Configuration
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 DC Level-Shifting
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 サポート・リソース
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.2 Anti-Phase Reversal Protection

When the input common-mode voltage approaches or exceeds VS–, the base-collector junction of the input transistors forward biases. This condition creates an output path parallel to the normal gm path of the transistors that is opposite in phase to the gm path. When this parallel path starts to dominate, phase inversion occurs. To protect against phase inversion, the OPA862 features anti-phase reversal (APR) protection Schottky diodes on the input transistors. The Schottky diodes turn on at a voltage lower than the forward bias voltage of the base-collector junction, thus preventing the forward bias and the phase-inversion at the base-collector junction of the input transistors. Figure 7-2 shows a diagram of APR protection within the OPA862.

GUID-93A58084-ABBC-4C7C-8144-43B810ED21CF-low.gifFigure 7-2 Anti-Phase Reversal Protection