JAJSSZ4C March 1993 – February 2024 SN75ALS1177 , SN75ALS1178
PRODUCTION DATA
- 1
- 1 特長
- 2 アプリケーション
- 3 概要
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Parameter Measurement Information
- 7 Detailed Description
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ（パッケージ｜ピン）
- NS|16
- N|16
サーマルパッド・メカニカル・データ
発注情報
6 Parameter Measurement Information
Figure 6-1 Driver Test Circuit, VOD and VOC
Figure 6-2 Receiver Test Circuit, VOH and VOL
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1MHz, 50% duty cycle, tr ≤ 10ns, tf ≤ 10ns.
Figure 6-3 Driver Propagation Delay Times
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1MHz, 50% duty cycle, tr ≤ 10ns, tf ≤ 10ns.
Figure 6-4 Driver Enable and Disable Times
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1MHz, 50% duty cycle, tr ≤ 10ns, tf ≤ 10ns.
Figure 6-5 Driver Enable and Disable Times
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1MHz, 50% duty cycle, tr ≤ 10ns, tf ≤ 10ns.
Figure 6-6 Receiver Propagation Delay Times
A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1MHz, 50% duty cycle, tr ≤ 10ns, tf ≤ 10ns.
Figure 6-7 Receiver Output Enable and Disable Times