JAJSEN9E october 2017 – july 2023 TAS2770
PRODUCTION DATA
Addr | Register | Description | Section |
0x00 | PAGE | Device Page | Section 8.5.2.1 |
0x01 | SW_RESET | Software Reset | Section 8.5.2.2 |
0x02 | PWR_CTL | Power Control | Section 8.5.2.3 |
0x03 | PB_CFG0 | Playback Configuration 0 | Section 8.5.2.4 |
0x04 | PB_CFG1 | Playback Configuration 1 | Section 8.5.2.5 |
0x05 | PB_CFG2 | Playback Configuration 2 | Section 8.5.2.6 |
0x06 | PB_CFG3 | Playback Configuration 3 | Section 8.5.2.7 |
0x07 | MISC_CFG | Misc Configuration | Section 8.5.2.8 |
0x08 | PDM_CFG0 | PDM Input Register 0 | Section 8.5.2.9 |
0x09 | PDM_CFG1 | PDM Configuration 1 | Section 8.5.2.10 |
0x0A | TDM_CFG0 | TDM Configuration 0 | Section 8.5.2.11 |
0x0B | TDM_CFG1 | TDM Configuration 1 | Section 8.5.2.12 |
0x0C | TDM_CFG2 | TDM Configuration 2 | Section 8.5.2.13 |
0x0D | TDM_CFG3 | TDM Configuration 3 | Section 8.5.2.14 |
0x0E | TDM_CFG4 | TDM Configuration 4 | Section 8.5.2.15 |
0x0F | TDM_CFG5 | TDM Configuration 5 | Section 8.5.2.16 |
0x10 | TDM_CFG6 | TDM Configuration 6 | Section 8.5.2.17 |
0x11 | TDM_CFG7 | TDM Configuration 7 | Section 8.5.2.18 |
0x12 | TDM_CFG8 | TDM Configuration 8 | Section 8.5.2.19 |
0x13 | TDM_CFG9 | TDM Configuration 9 | Section 8.5.2.20 |
0x14 | TDM_CFG10 | TDM Configuration 10 | Section 8.5.2.21 |
0x15 | LIM_CFG0 | Limiter Configuration 0 | Section 8.5.2.22 |
0x16 | LIM_CFG1 | Limiter Configuration 1 | Section 8.5.2.23 |
0x17 | LIM_CFG2 | Limiter Configuration 2 | Section 8.5.2.24 |
0x18 | LIM_CFG3 | Limiter Configuration 3 | Section 8.5.2.25 |
0x19 | LIM_CFG4 | Limiter Configuration 4 | Section 8.5.2.26 |
0x1A | LIM_CFG5 | Limiter Configuration 5 | Section 8.5.2.27 |
0x1B | BOP_CFG0 | Brown Out Prevention 0 | Section 8.5.2.28 |
0x1C | BOP_CFG1 | Brown Out Prevention 1 | Section 8.5.2.29 |
0x1D | BOP_CFG2 | Brown Out Prevention 2 | Section 8.5.2.30 |
0x1E | ICLA_CFG0 | Inter Chip Limiter Alignment 0 | Section 8.5.2.31 |
0x1F | ICLA_CFG1 | Inter Chip Limiter Alignment 1 | Section 8.5.2.32 |
0x20 | INT_MASK0 | Interrupt Mask 0 | Section 8.5.2.33 |
0x21 | INT_MASK1 | Interrupt Mask 1 | Section 8.5.2.34 |
0x22 | INT_LIVE0 | Live Interrupt Readback 0 | Section 8.5.2.35 |
0x23 | INT_LIVE1 | Live Interrupt Readback 1 | Section 8.5.2.36 |
0x24 | INT_LTCH0 | Latched Interrupt Readback 0 | Section 8.5.2.37 |
0x25 | INT_LTCH1 | Latched Interrupt Readback 1 | Section 8.5.2.38 |
0x27 | VBAT_MSB | SAR ADC Conversion 0 | Section 8.5.2.40 |
0x28 | VBAT_LSB | SAR ADC Conversion 1 | Section 8.5.2.41 |
0x29 | TEMP_MSB | SAR ADC Conversion 2 | Section 8.5.2.42 |
0x2A | TEMP_LSB | SAR ADC Conversion 2 | Section 8.5.2.43 |
0x30 | INT_CFG | Interrupt Configuration | Section 8.5.2.44 |
0x31 | DIN_PD | Digital Input Pin Pull Down | Section 8.5.2.45 |
0x32 | MISC_IRQ | Misc Configuration | Section 8.5.2.46 |
0x3C | CLOCK_CFG | Clock Configuration | Section 8.5.2.47 |
0x77 | TDM_DET | TDM Clock detection monitor | Section 8.5.2.48 |
0x7D | REV_ID | Revision and PG ID | Section 8.5.2.49 |
0x7E | I2C_CKSUM | I2C Checksum | Section 8.5.2.50 |
0x7F | BOOK | Device Book | Section 8.5.2.51 |