JAJSE38F November   2017  – November 2023 TCAN1043-Q1 , TCAN1043G-Q1 , TCAN1043H-Q1 , TCAN1043HG-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings IEC Specification
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Dissipation Ratings
    7. 6.7 Electrical Characteristics
    8. 6.8 Switching Characteristics
    9. 6.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Internal and External Indicator Flags (nFAULT and RXD)
      2. 8.3.2 Power-Up Flag (PWRON)
      3. 8.3.3 Wake-Up Request Flag (WAKERQ)
      4. 8.3.4 Wake-Up Source Recognition Flag (WAKESR)
      5. 8.3.5 Undervoltage Fault Flags
        1. 8.3.5.1 Undervoltage on VCC Fault
        2. 8.3.5.2 Undervoltage on VIO Fault
        3. 8.3.5.3 Undervoltage on VSUP Fault
      6. 8.3.6 CAN Bus Failure Fault Flag
      7. 8.3.7 Local Faults
        1. 8.3.7.1 TXD Dominant Timeout (TXD DTO)
        2. 8.3.7.2 TXD Shorted to RXD Fault
        3. 8.3.7.3 CAN Bus Dominant Fault
        4. 8.3.7.4 Thermal Shutdown (TSD)
        5. 8.3.7.5 RXD Recessive Fault
        6. 8.3.7.6 Undervoltage Lockout (UVLO)
        7. 8.3.7.7 Unpowered Device
        8. 8.3.7.8 Floating Terminals
        9. 8.3.7.9 CAN Bus Short Circuit Current Limiting
    4. 8.4 Device Functional Modes
      1. 8.4.1 CAN Bus States
      2. 8.4.2 Normal Mode
      3. 8.4.3 Silent Mode
      4. 8.4.4 Standby Mode
      5. 8.4.5 Go-to-Sleep Mode
      6. 8.4.6 Sleep Mode with Remote Wake and Local Wake Up Requests
        1. 8.4.6.1 Remote Wake Request via Wake Up Pattern (WUP)
        2. 8.4.6.2 Local Wake Up (LWU) via WAKE Input Terminal
      7. 8.4.7 Driver and Receiver Function Tables
      8. 8.4.8 Digital Inputs and Outputs
      9. 8.4.9 INH (Inhibit) Output
  10. Application Information Disclaimer
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Bus Loading, Length and Number of Nodes
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 CAN Termination
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout
        1. 9.4.1.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 サポート・リソース
    3. 10.3 商標
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

Figure 5-1 D Package, 14 Pin (SOIC)
(Top View)
Figure 5-2 DMT Package, 14 Pin (VSON)
Top View
Table 5-1 Pin Functions
PINS TYPE DESCRIPTION
NAME NO
TXD 1 Digital Input CAN transmit data input (low for dominant and high for recessive bus states)
GND 2 GND Ground connection
VCC 3 Supply 5-V CAN bus supply voltage
RXD 4 Digital Output CAN receive data output (low for dominant and high for recessive bus states), tri-state
VIO 5 Supply I/O supply voltage
EN 6 Digital Input Enable input for mode control, integrated pull down
INH 7 High Voltage Output Can be used to control system voltage regulators
nFAULT 8 Digital Output Fault output, inverted logic
WAKE 9 High Voltage Input Wake input terminal, high voltage input
VSUP 10 Supply Reverse-blocked battery supply input
NC 11 No connect (not internally connected)
CANL 12 Bus I/O Low-level CAN bus input/output line
CANH 13 Bus I/O High-level CAN bus input/output line
nSTB 14 Digital Input Standby input for mode control, integrated pull down