10.2.2.2 Detailed Design Procedure

The THS4541-Q1 provides a very flexible element for interfacing from a variety of sources to a wide range of ADCs. Because all precision and high-speed ADCs require a differential input on a common-mode voltage, this design is the primary application for the THS4541-Q1.

The THS4541-Q1 provides a simple interface to a wide variety of precision SAR, ΔΣ, or higher-speed pipeline ADCs. To deliver the exceptional distortion at the output pins, considerably wider bandwidth than typically required in the signal path to the ADC inputs is provided by the THS4541-Q1. For instance, the gain of 2 single-ended to differential design example provides approximately a 500-MHz, small-signal bandwidth. Even if the source signal is Nyquist bandlimited, this broad bandwidth can possibly integrate enough THS4541-Q1 noise to degrade the SNR through the ADC if the broadband noise is not bandlimited between the amplifier and ADC.

Figure 80 shows an example DC-coupled, gain of 2 interface with a controlled, interstage-bandwidth filter implemented on the demonstration board for the JESD digital-output interface, ADC34J22 (a 50-MSPS, quad, 12-bit ADC). This board is called the DEV-ADC34J22 ADC HSMC MODULE with complete documentation at http://dallaslogic.com/prod_dev-adc34j/.

Designed for a DC-coupled 50Ω input match, this design starts with a 499-Ω feedback resistor, and provides a gain of 2.35V/V to the THS4541-Q1 output pins. The third-order interstage, low-pass filter provides a 20-MHz Bessel response with a 0.85 V/V insertion loss to the ADC, providing a net gain of 2 V/V from board edge to the ADC inputs. Although the THS4541-Q1 can absorb overdrives, an external protection element is added using the BAV99 low-capacitance device, shown in Figure 80. For DC-coupled testing, pins 1 and 2 are jumpered together. When the source is an AC-coupled, 50-Ω source, pins 2 and 3 are jumpered to maintain differential balance. FFT testing normally uses a bandpass filter into the board; an AC-coupled source. A typical 5-MHz, full-scale, single-tone FFT is shown in Figure 81, where the jumper is placed from pins 2 to 3. The reported SNR of 70.09 dBFs is only a slight reduction from the tested ADC-only performance of 70.42 dBFs, showing the value of the interstage noise bandwidth limiting filter. The exceptionally low harmonic distortion for the THS4541-Q1 also shows up in the very low SFDR and THD shown in Figure 81. This 96-dB SFDR and 92.83-dB THD are comparable to the ADC-only test results.