SLVS973A September   2009  – July 2015 TLC5926-Q1 , TLC5927-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics: VDD = 3 V
    6. 7.6  Electrical Characteristics: VDD = 5.5 V
    7. 7.7  Timing Requirements
    8. 7.8  Switching Characteristics: VDD = 3 V
    9. 7.9  Switching Characteristics: VDD = 5.5 V
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Open-Circuit Detection Principle
      2. 9.3.2 Short-Circuit Detection Principle (TLC5927-Q1 Only)
      3. 9.3.3 Overtemperature Detection and Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation Mode Switching
      2. 9.4.2 Normal Mode Phase
      3. 9.4.3 Special Mode Phase
        1. 9.4.3.1 Reading Error Status Code in Special Mode
        2. 9.4.3.2 Writing Configuration Code in Special Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Constant Current
      2. 10.1.2 Adjusting Output Current
      3. 10.1.3 16-Bit Configuration Code and Current Gain
    2. 10.2 Typical Applications
      1. 10.2.1 Single Implementation of TLC5926/TLC5927-Q1 Device
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 Cascading Implementation of TLC5926/ TLC5927-Q1 Device
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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発注情報

9 Detailed Description

9.1 Overview

The TLC592x-Q1 is designed for LED displays and LED lighting applications with open-load, shorted-load, and overtemperature detection, and constant-current control. The TLC592x-Q1 contains a 16-bit shift register and data latches, which convert serial input data into parallel output format. At the TLC592x-Q1 output stage, 16 regulated- current ports provide uniform and constant current for driving LEDs within a wide range of VF (Forward Voltage) variations. Used in systems designed for LED display applications (that is, LED panels), TLC592x-Q1 provides great flexibility and device performance. Users can adjust the output current from 5 mA to 120 mA through an external resistor, R-EXT, which gives flexibility in controlling the light intensity of LEDs. TLC592x-Q1 is designed for up to 17 V at the output port. The high clock frequency, 30 MHz, also satisfies the system requirements of high-volume data transmission.

9.2 Functional Block Diagram

TLC5926-Q1 TLC5927-Q1 bd_lvs973.gif

9.3 Feature Description

9.3.1 Open-Circuit Detection Principle

The LED Open-Circuit Detection compares the effective current level IOUT with the open load detection threshold current IOUT,Th. If IOUT is below the IOUT,Th threshold, the TLC592x-Q1 detects an open-load condition. This error status can be read as an error status code in the Special mode. For open-circuit error detection, a channel must be on.

Table 1. Open-Circuit Detection

STATE OF OUTPUT PORT CONDITION OF OUTPUT CURRENT ERROR STATUS CODE MEANING
Off IOUT = 0 mA 0 Detection not possible
On IOUT < IOUT,Th(1) 0 Open circuit
IOUT ≥ IOUT,Th(1) 1 Normal
(1) IOUT,Th = 0.5 × IOUT,target (typical)

9.3.2 Short-Circuit Detection Principle (TLC5927-Q1 Only)

The LED short-circuit detection compares the effective voltage level VOUT with the shorted-load detection threshold voltages VOUT,TTh and VOUT,RTh. If VOUT is above the VOUT,TTh threshold, the TLC5927-Q1 detects a shorted-load condition. If the VOUT is below VOUT,RTh threshold, no error is detected and the error bit is reset. This error status can be read as an error status code in the Special mode. For short-circuit error detection, a channel must be on.

Table 2. Short-Circuit Detection

STATE OF OUTPUT PORT CONDITION OF OUTPUT VOLTAGE ERROR STATUS CODE MEANING
Off IOUT = 0 mA 0 Detection not possible
On VOUT ≥ VOUT,TTh 0 Short circuit
VOUT < VOUT,RTh 1 Normal
TLC5926-Q1 TLC5927-Q1 shrt_crct_det_prncpl_slvs973.gifFigure 7. Short-Circuit Detection Principle

9.3.3 Overtemperature Detection and Shutdown

The TLC592x-Q1 is equipped with a global overtemperature sensor and 16 individual, channel-specific overtemperature sensors.

  • When the global sensor reaches the trip temperature, all output channels are shutdown, and the error status is stored in the internal Error Status register of every channel. After shutdown, the channels automatically restart after cooling down, if the control signal (output latch) remains on. The stored error status is not reset after cooling down and can be read out as the error status code in the Special mode.
  • When one of the channel-specific sensors reaches trip temperature, only the affected output channel is shut down, and the error status is stored only in the internal Error Status register of the affected channel. After shutdown, the channel automatically restarts after cooling down, if the control signal (output latch) remains on. The stored error status is not reset after cooling down and can be read out as error status code in the Special mode.

For channel-specific overtemperature error detection, a channel must be on.

The error status code is reset when the TLC592x-Q1 returns to Normal mode.

Table 3. Overtemperature Detection(1)

STATE OF OUTPUT PORT CONDITION ERROR STATUS CODE MEANING
Off IOUT = 0 mA 0
On
On → all channels
Off		 Tj < Tj,trip global 1 Normal
Tj > Tj,trip global All error status bits = 0 Global overtemperature
On
On → Off		 Tj < Tj,trip channel n 1 Normal
Tj > Tj,trip channel n Channel n error status bit = 0 Channel n overtemperature
(1) The global shutdown threshold temperature is approximately 170°C.

9.4 Device Functional Modes

The TLC5926/TLC5927-Q1 provides a Special Mode in which two functions are included: Error Detection and Current Gain Control. In the TLC5926/TLC5927-Q1 there are two operation modes and three phases: Normal Mode phase, Mode Switching transition phase, and Special mode phase. The signal on the multiple- function pin OE(ED2) is monitored, and when a one- clock-wide short pulse appears on OE(ED2), TLC5926/TLC5927-Q1 enters the Mode Switching phase. At this time, the voltage level on LE (ED1) determines the next mode into which the TLC5926/TLC5927-Q1 switches.

In the Normal Mode phase, the serial data is transferred into TLC5926/TLC5927-Q1 via SDI, shifted in the shift register, and transferred out via SDO. LE (ED1) can latch the serial data in the shift register to the output latch. OE(ED2) enables the output drivers to sink current.

In the Special Mode phase, the low-voltage-level signal OE(ED2) can enable output channels and detect the status of the output current, to tell if the driving current level is enough or not. The detected error status is loaded into the 16-bit shift register and shifted out via SDO, along with the CLK signal. The system controller can read the error status to determine whether or not the LEDs are properly lit. In the Special Mode phase, TLC5926/TLC5927-Q1 also allows users to adjust the output current level by setting a runtime-programmable Configuration Code. The code is sent into TLC5926/TLC5927-Q1 via SDI. The positive pulse of LE (ED1) latches the code in the shift register into a built-in 8-bit configuration latch, instead of the output latch. The code affects the voltage at R-EXT and controls the output-current regulator. The output current can be adjusted finely by a gain ranging from 1/12 to 127/128 in 256 steps. Therefore, the current skew between ICs can be compensated within less than 1%, and this feature is suitable for white balancing in LED color-display panels.

TLC5926-Q1 TLC5927-Q1 t_normal_mode_lvs973.gifFigure 8. Normal Mode

Table 4. Truth Table in Normal Mode

CLK LE(ED1) OE(ED2) SDI OUT0...OUT15 SDO
↑ H L Dn Dn...Dn – 7...Dn – 15 Dn – 15
↑ L L Dn + 1 No change Dn – 14
↑ H L Dn + 2 Dn + 2...Dn – 5...Dn – 13 Dn – 13
↓ X L Dn + 3 Dn + 2...Dn – 5...Dn – 13 Dn – 13
↓ X H Dn + 3 off Dn – 13

The signal sequence shown in Figure 9 makes the TLC592x-Q1 enter Current Adjust and Error Detection mode.

TLC5926-Q1 TLC5927-Q1 t_sw_special_mode_lvs973.gifFigure 9. Switching to Special Mode

In the Current Adjust mode, sending the positive pulse of LE(ED1), the content of the shift register (a current adjust code) is written to the 16-bit configuration latch (see Figure 10).

TLC5926-Q1 TLC5927-Q1 wrtng_config_code_01_slvs973.gifFigure 10. Writing Configuration Code

When the TLC592x-Q1 is in the error detection mode, the signal sequence shown in Figure 11 enables a system controller to read error status codes through SDO.

TLC5926-Q1 TLC5927-Q1 t_rd_err_status_code_lvs973.gifFigure 11. Reading Error Status Code

The signal sequence shown in Figure 12 makes TLC592x-Q1 resume the Normal mode. Switching to Normal mode resets all internal Error Status registers. OE (ED2) always enables the output port, whether the TLC592x-Q1 enters current adjust mode or not.

TLC5926-Q1 TLC5927-Q1 t_sw_normal_mode_lvs973.gifFigure 12. Switching to Normal Mode

9.4.1 Operation Mode Switching

In order to switch between its two modes, TLC592x-Q1 monitors the signal OE(ED2). When a one-clock-wide pulse of OE(ED2) appears, TLC592x-Q1 enters the two-clock-period transition phase, the Mode Switching phase. After power on, the default operation mode is the Normal Mode (see Figure 13).

TLC5926-Q1 TLC5927-Q1 ai_oper_mode_switch_lvs973.gifFigure 13. Mode Switching

As shown in Figure 13, once a one-clock-wide short pulse (101) of OE(ED2) appears, TLC592x-Q1 enters the Mode Switching phase. At the fourth rising edge of CLK, if LE(ED1) is sampled as voltage high, TLC592x-Q1 switches to Special mode; otherwise, it switches to Normal mode. The signal LE(ED1) between the third and the fifth rising edges of CLK cannot latch any data. Its level is used only to determine into which mode to switch. However, the short pulse of OE(ED2) can still enable the output ports. During mode switching, the serial data can still be transferred through SDI and shifted out from SDO.

NOTE

  1. The signal sequence for the mode switching may be used frequently to ensure that the TLC592x-Q1 is in the proper mode.
  2. The 1 and 0 on the LE(ED1) signal are sampled at the rising edge of CLK. The X means its level does not affect the result of mode switching mechanism.
  3. After power on, the default operation mode is Normal mode.

9.4.2 Normal Mode Phase

Serial data is transferred into TLC592x-Q1 via SDI, shifted in the Shift Register, and output via SDO. LE(ED1) can latch the serial data in the Shift Register to the Output Latch. OE(ED2) enables the output drivers to sink current. These functions differ only as described in Operation Mode Switching, in which case, a short pulse triggers TLC592x-Q1 to switch the operation mode. However, as long as LE(ED1) is high in the Mode Switching phase, TLC592x-Q1 remains in the Normal mode, as if no mode switching occurred.

9.4.3 Special Mode Phase

In the Special mode, as long as OE(ED2) is not low, the serial data is shifted to the Shift Register via SDI and shifted out via SDO, as in the Normal mode. However, there are two differences between the Special Mode and the Normal Mode, as shown in the following sections.

9.4.3.1 Reading Error Status Code in Special Mode

When OE(ED2) is pulled low while in Special mode, error detection and load error status codes are loaded into the Shift Register, in addition to enabling output ports to sink current. Figure 14 shows the timing sequence for error detection. The 0 and 1 signal levels are sampled at the rising edge of each CLK. At least three zeros must be sampled at the voltage low signal OE(ED2). Immediately after the second 0 is sampled, the data input source of the Shift Register changes to the 16-bit parallel Error Status Code register, instead of from the serial data on SDI. Normally, the error status codes are generated at least 2 μs after the falling edge of OE(ED2). The occurrence of the third or later 0 saves the detected error status codes into the Shift Register. Therefore, when OE(ED2) is low, the serial data cannot be shifted into TLC592x-Q1 via SDI. When OE(ED2) is pulled high, the data input source of the Shift Register is changed back to SDI. At the same time, the output ports are disabled and the error detection is completed. Then, the error status codes saved in the Shift Register can be shifted out via SDO bit-by-bit along with CLK, as well as the new serial data can be shifted into TLC592x-Q1 via SDI.

While in Special mode, the TLC592x-Q1 cannot simultaneously transfer serial data and detect LED load error status.

TLC5926-Q1 TLC5927-Q1 ai_read_error_status_lvs973.gifFigure 14. Reading Error Status Code

9.4.3.2 Writing Configuration Code in Special Mode

When in Special mode, the active high signal LE(ED1) latches the serial data in the Shift Register to the Configuration Latch, instead of the Output Latch. The latched serial data is used as the Configuration Code.

The code is stored until power off or the Configuration Latch is rewritten. As shown in Figure 15, the timing for writing the Configuration Code is the same as the timing in the Normal Mode to latching output channel data. Both the Configuration Code and Error Status Code are transferred in the common 16-bit Shift Register. Users must pay attention to the sequence of error detection and current adjustment to avoid the Configuration Code being overwritten by Error Status Code.

TLC5926-Q1 TLC5927-Q1 wrtng_config_code_02_slvs973.gifFigure 15. Writing Configuration Code