SBOS685C April   2014  – July 2015 TMP007

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Spectral Responsivity
      2. 7.3.2 Field of View and Angular Response
      3. 7.3.3 Thermopile Principles and Operation
      4. 7.3.4 Object Temperature Calculation
      5. 7.3.5 Calibration
      6. 7.3.6 Sensor Voltage Format
      7. 7.3.7 Temperature Format
      8. 7.3.8 Serial Interface
        1. 7.3.8.1  Bus Overview
        2. 7.3.8.2  Serial Bus Address
        3. 7.3.8.3  Writing and Reading Operations
        4. 7.3.8.4  Slave Mode Operations
          1. 7.3.8.4.1 Slave Receiver Mode
          2. 7.3.8.4.2 Slave Transmitter Mode:
        5. 7.3.8.5  SMBus Alert Function
        6. 7.3.8.6  General Call
        7. 7.3.8.7  High-Speed (Hs) Mode
        8. 7.3.8.8  Timeout Function
        9. 7.3.8.9  Two-Wire Timing
        10. 7.3.8.10 Two-Wire Timing Diagrams
    4. 7.4 Device Functional Modes
      1. 7.4.1 Temperature Transient Correction
      2. 7.4.2 Alert Modes: Interupt (INT) and Comparator (COMP)
        1. 7.4.2.1 INT Mode (INT/COMP = 0)
        2. 7.4.2.2 COMP Mode (INT/COMP = 1)
      3. 7.4.3 Nonvolatile Memory Description
        1. 7.4.3.1 Programming the Nonvolatile Memory
        2. 7.4.3.2 Memory Store and Register Load From Memory
    5. 7.5 Register Maps
      1. 7.5.1  Sensor Voltage Result Register (address = 00h) [reset = 0000h]
      2. 7.5.2  TDIE Local Temperature Result Register (address = 01h) [reset = 0000h]
      3. 7.5.3  Configuration Register (address = 02h) [reset = 1440h]
      4. 7.5.4  TOBJ Object Temperature Result Register (address = 03h) [reset = 0000h]
      5. 7.5.5  Status Register (address = 04h) [reset = 0000h]
      6. 7.5.6  Status Mask and Enable Register (address = 05h) [reset = 0000h]
      7. 7.5.7  TOBJ Object Temperature High-Limit Register (address = 06h) [reset = 7FC0h]
      8. 7.5.8  TOBJ Object Temperature Low-Limit Register (address = 07h) [reset = 8000h]
      9. 7.5.9  TDIE Local Temperature High-Limit Register (address = 08h) [reset = 7FC0h]
      10. 7.5.10 TDIE Local Temperature Low-Limit Register (address = 09h) [reset = 8000h]
      11. 7.5.11 Coefficient Registers
        1. 7.5.11.1 S0 Coefficient Register (address = 0Ah) [reset = 260Eh]
        2. 7.5.11.2 A1 Coefficient Register (address = 0Bh) [reset = 0106h]
        3. 7.5.11.3 A2 Coefficient Register (address = 0Ch) [reset = FF9Bh]
        4. 7.5.11.4 B0 Coefficient Register (address = 0Dh) [reset = FF3Ah]
        5. 7.5.11.5 B1 Coefficient Register (address = 0Eh) [reset = FF71h]
        6. 7.5.11.6 B2 Coefficient Register (address = 0Fh) [reset = 0553h]
        7. 7.5.11.7 C2 Coefficient Register (address = 10h) [reset = 0000h]
        8. 7.5.11.8 TC0 Coefficient Register (address = 11h) [reset = 0034h]
        9. 7.5.11.9 TC1 Coefficient Register (address = 12h) [reset = 0000h]
      12. 7.5.12 Manufacturer ID Register (address = 1Eh) [reset = 5449h]
      13. 7.5.13 Device ID Register (address = 1Fh) [reset = 0078h]
      14. 7.5.14 Memory Access Register (address = 2Ah) [reset = 0000h]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Wide-Range Calibration Example: TOBJ = 0°C to 60°C, Common Versus Unit Calibration
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Wide-Range Calibration
          2. 8.2.1.2.2 Verifying the Calibration
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Narrow-Range Calibration Example: TOBJ = 33°C to 41°C, Unit vs Common Calibration
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Narrow-Range Calibration
          2. 8.2.2.2.2 Verifying the Calibration
        3. 8.2.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Use of NEP, NETD, and Responsivity in Estimating System Performance
  9. 9 Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

The IR thermopile sensor in the TMP007 is as susceptible to conducted and radiant IR energy from below the sensor on the PCB as it is to the IR energy from objects in its forward-looking field of view. When the area of PCB below the TMP007 is at the same temperature as the die or substrate of the TMP007, heat is not transferred between the IR sensor and the PCB. However, temperature changes on a closely-placed target object or other events that lead to changes in system temperature can cause the PCB temperature and the TMP007 temperature to drift apart from each other. This drift in temperatures can cause a heat transfer between the IR sensor and the PCB to occur. Because of the small distance between the PCB and the bottom of the sensor, this heat energy will be conducted (as opposed to radiated) through the thin layer of air between the IR sensor and the PCB below it. This heat conduction causes offsets in the IR sensor voltage readings and ultimately leads to temperature calculation errors. To prevent and minimize these errors, the TMP007 layout must address critical factors:

Thermally isolate the TMP007 from the rest of the PCB and any heat sources on it. Provide a stable thermal environment to reduce the noise in the measurement readings

Figure 60 illustrates the concept of thermally isolating the TMP007 from the PCB and external heat sources such as other components, air currents, and so on.

TMP007 ai_thermal_isolation_sbos685.gif Figure 60. Principle of TMP007 Thermal Isolation

10.2 Layout Examples

For more detailed information, refer to SBOU143 — TMP007 Layout and Assembly Guide.

TMP007 top_layer_sbos685.gif Figure 61. Layout Example
TMP007 enlarged_view_bos685.gif Figure 62. Enlarged View