JAJSG86C November   2018  – February 2024 TMUX1104

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics (VDD = 5V ±10 %)
    6. 5.6 Electrical Characteristics (VDD = 3.3V ±10 %)
    7. 5.7 Electrical Characteristics (VDD = 1.8V ±10 %)
    8. 5.8 Electrical Characteristics (VDD = 1.2V ±10 %)
    9. 5.9 Typical Characteristics
  7. Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  Transition Time
    5. 6.5  Break-Before-Make
    6. 6.6  tON(EN) and tOFF(EN)
    7. 6.7  Charge Injection
    8. 6.8  Off Isolation
    9. 6.9  Crosstalk
    10. 6.10 Bandwidth
  8. Detailed Description
    1. 7.1 Functional Block Diagram
    2. 7.2 Feature Description
      1. 7.2.1 Bidirectional Operation
      2. 7.2.2 Rail to Rail Operation
      3. 7.2.3 1.8V Logic Compatible Inputs
      4. 7.2.4 Fail-Safe Logic
      5. 7.2.5 Ultra-low Leakage Current
      6. 7.2.6 Ultra-low Charge Injection
    3. 7.3 Device Functional Modes
    4. 7.4 Truth Tables
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • DGS|10
  • DQA|10
サーマルパッド・メカニカル・データ
発注情報

Pin Configuration and Functions

GUID-5CA86C21-D51E-4480-9093-AE4D84D2A88D-low.svgFigure 4-1 DGS Package,
10-Pin VSSOP (Top View)
GUID-916855F3-432F-4D9E-BD9C-A818858BA0C3-low.svgFigure 4-2 DQA Package,
10-Pin USON (Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
A0 1 I Address line 0. Controls the switch configuration as shown in Table 7-1.
S1 2 I/O Source pin 1. Can be an input or output.
GND 3 P Ground (0V) reference
S3 4 I/O Source pin 3. Can be an input or output.
EN 5 I Active high logic enable. When this pin is low, all switches are turned off. When this pin is high, the A[1:0] logic inputs determine which switch is turned on.
VDD 6 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1µF to 10µF between VDD and GND.
S4 7 I/O Source pin 4. Can be an input or output.
D 8 I/O Drain pin. Can be an input or output.
S2 9 I/O Source pin 2. Can be an input or output.
A1 10 I Address line 1. Controls the switch configuration as shown in Table 7-1.
I = input, O = output, I/O = input and output, P = power