JAJSEX8A March   2018  – June 2018 TPA3138D2

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
      2.      フェライト・ビーズ付きのTPA3138のレイアウト
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Analog Gain
      2. 9.3.2  SD/FAULT Operation
      3. 9.3.3  PLIMIT
      4. 9.3.4  Spread Spectrum and De-Phase Control
      5. 9.3.5  GVDD Supply
      6. 9.3.6  DC Detect
      7. 9.3.7  PBTL Select
      8. 9.3.8  Short-Circuit Protection and Automatic Recovery Feature
      9. 9.3.9  Over-Temperature Protection (OTP)
      10. 9.3.10 Over-Voltage Protection (OVP)
      11. 9.3.11 Under-Voltage Protection (UVP)
    4. 9.4 Device Functional Modes
      1. 9.4.1 MODE_SEL = LOW: BD Modulation
      2. 9.4.2 MODE_SEL = HIGH: Low-Idle-Current 1SPW Modulation
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 PCB Material Recommendation
        2. 10.2.1.2 PVCC Capacitor Recommendation
        3. 10.2.1.3 Decoupling Capacitor Recommendations
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Ferrite Bead Filter Considerations
        2. 10.2.2.2 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme
        3. 10.2.2.3 When to Use an Output Filter for EMI Suppression
        4. 10.2.2.4 Input Resistance
        5. 10.2.2.5 Input Capacitor, Ci
        6. 10.2.2.6 BSN and BSP Capacitors
        7. 10.2.2.7 Differential Inputs
        8. 10.2.2.8 Using Low-ESR Capacitors
      3. 10.2.3 Application Performance Curves
        1. 10.2.3.1 EN55013 Radiated Emissions Results
        2. 10.2.3.2 EN55022 Conducted Emissions Results
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Decoupling, CS
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
      1. 13.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 13.2 ドキュメントのサポート
      1. 13.2.1 関連資料
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.4.1 MODE_SEL = LOW: BD Modulation

This is a modulation scheme that allows operation without the classic LC reconstruction filter when the amp is driving an inductive load with short speaker wires. Each output is switching from 0 volts to the supply voltage. The OUTPx and OUTNx are in phase with each other with no input so that there is little or no current in the speaker. The duty cycle of OUTPx is greater than 50% and OUTNx is less than 50% for positive output voltages. The duty cycle of OUTPx is less than 50% and OUTNx is greater than 50% for negative output voltages. The voltage across the load sits at 0 V throughout most of the switching period, reducing the switching current, which reduces any I2R losses in the load.

TPA3138D2 BD_mode_modulation_los708.gifFigure 18. BD Mode Modulation