SLASE99A December   2015  – April 2016 TPA3250

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Audio Characteristics (BTL)
    7. 7.7  Audio Characteristics (SE)
    8. 7.8  Audio Characteristics (PBTL)
    9. 7.9  Typical Characteristics, BTL Configuration
    10. 7.10 Typical Characteristics, SE Configuration
    11. 7.11 Typical Characteristics, PBTL Configuration
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Error Reporting
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device Protection System
        1. 9.4.1.1 Overload and Short Circuit Current Protection
        2. 9.4.1.2 DC Speaker Protection
        3. 9.4.1.3 Pin-to-Pin Short Circuit Protection (PPSC)
        4. 9.4.1.4 Overtemperature Protection OTW and OTE
        5. 9.4.1.5 Undervoltage Protection (UVP) and Power-on Reset (POR)
        6. 9.4.1.6 Fault Handling
        7. 9.4.1.7 Device Reset
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Stereo BTL Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedures
          1. 10.2.1.2.1 Decoupling Capacitor Recommendations
          2. 10.2.1.2.2 PVDD Capacitor Recommendation
          3. 10.2.1.2.3 PCB Material Recommendation
          4. 10.2.1.2.4 Oscillator
      2. 10.2.2 Application Curves
      3. 10.2.3 Typical Application, Single Ended (1N) SE
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedures
        3. 10.2.3.3 Application Curves
      4. 10.2.4 Typical Application, Differential (2N) PBTL
        1. 10.2.4.1 Design Requirements
        2. 10.2.4.2 Detailed Design Procedures
        3. 10.2.4.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Power Supplies
      1. 11.1.1 VDD Supply
      2. 11.1.2 GVDD_X Supply
      3. 11.1.3 PVDD Supply
    2. 11.2 Powering Up
    3. 11.3 Powering Down
    4. 11.4 Thermal Design
      1. 11.4.1 Thermal Performance
      2. 11.4.2 Thermal Performance with Continuous Output Power
      3. 11.4.3 Thermal Performance with Non-Continuous Output Power
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
      1. 12.2.1 BTL Application Printed Circuit Board Layout Example
      2. 12.2.2 SE Application Printed Circuit Board Layout Example
      3. 12.2.3 PBTL Application Printed Circuit Board Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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発注情報

11 Power Supply Recommendations

11.1 Power Supplies

The TPA3250 device requires two external power supplies for proper operation. A high-voltage supply called PVDD is required to power the output stage of the speaker amplifier and its associated circuitry. Additionally, one mid-voltage power supply for GVDD_X and VDD is required to power the gate-drive and other internal digital and analog portions of the device. The allowable voltage range for both the PVDD and the GVDD_X/VDD supplies are listed in the Recommended Operating Conditions table. Ensure both the PVDD and the GVDD_X/VDD supplies can deliver more current than listed in the Electrical Characteristics table.

11.1.1 VDD Supply

The VDD supply required from the system is used to power several portions of the device. It provides power to internal regulators DVDD and AVDD that are used to power digital and analog sections of the device, respectively. Proper connection, routing, and decoupling techniques are highlighted in the TPA3250 device EVM User's Guide SLVUAG8 (as well as the Application Information section and Layout Examples section) and must be followed as closely as possible for proper operation and performance. Deviation from the guidance offered in the TPA3250 device EVM User's Guide, which followed the same techniques as those shown in the Application Information section, may result in reduced performance, errant functionality, or even damage to the TPA3250 device. Some portions of the device also require a separate power supply which is a lower voltage than the VDD supply. To simplify the power supply requirements for the system, the TPA3250 device includes integrated low-dropout (LDO) linear regulators to create these supplies. These linear regulators are internally connected to the VDD supply and their outputs are presented on AVDD and DVDD pins, providing a connection point for an external bypass capacitors. It is important to note that the linear regulators integrated in the device have only been designed to support the current requirements of the internal circuitry, and should not be used to power any additional external circuitry. Additional loading on these pins could cause the voltage to sag and increase noise injection, which negatively affects the performance and operation of the device.

11.1.2 GVDD_X Supply

The GVDD_X supply required from the system is used to power the gate-drives for the output H-bridges. Proper connection, routing, and decoupling techniques are highlighted in the TPA3250 device EVM User's Guide SLVUAG8 (as well as the Application Information section and Layout Examples section) and must be followed as closely as possible for proper operation and performance. Deviation from the guidance offered in the TPA3250 device EVM User's Guide, which followed the same techniques as those shown in the Application Information section, may result in reduced performance, errant functionality, or even damage to the TPA3250 device.

11.1.3 PVDD Supply

The output stage of the speaker amplifier drives the load using the PVDD supply. This is the power supply which provides the drive current to the load during playback. Proper connection, routing, and decoupling techniques are highlighted in the TPA3250 device EVM User's Guide SLVUAG8 (as well as the Application Information section and Layout Examples section) and must be followed as closely as possible for proper operation and performance. Due the high-voltage switching of the output stage, it is particularly important to properly decouple the output power stages in the manner described in the TPA3250 device EVM User's Guide SLVUAG8. The lack of proper decoupling, like that shown in the EVM User's Guide, can results in voltage spikes which can damage the device, or cause poor audio performance and device shutdown faults.

11.2 Powering Up

The TPA3250 does not require a power-up sequence, but it is recommended to hold RESET low minimum 400ms after PVDD supply voltage is turned ON. The outputs of the H-bridges remain in a high-impedance state until the gate-drive supply voltage (GVDD_X) and VDD voltage are above the undervoltage protection (UVP) voltage threshold (see the Electrical Characteristics table of this data sheet). This allows an internal circuit to charge the external bootstrap capacitors by enabling a weak pulldown of the half-bridge output as well as initiating a controlled ramp up sequence of the output voltage.

TPA3250 StartupTiming.gif Figure 25. Startup Timing

When RESET is released to turn on TPA3250, FAULT signal will turn low and AVDD voltage regulator will be enabled. FAULT will stay low until AVDD reaches the undervoltage protection (UVP) voltage threshold (see the Electrical Characteristics table of this data sheet). After a precharge time to stabilize the DC voltage across the input AC coupling capacitors, before the ramp up sequence starts.

11.3 Powering Down

The TPA3250 does not require a power-down sequence. The device remains fully operational as long as the gate-drive supply (GVDD_X) voltage and VDD voltage are above the undervoltage protection (UVP) voltage threshold (see the Electrical Characteristics table of this data sheet). Although not specifically required, it is a good practice to hold RESET low during power down, thus preventing audible artifacts including pops or clicks by initiating a controlled ramp down sequence of the output voltage.

11.4 Thermal Design

11.4.1 Thermal Performance

TPA3250 thermal performance is dependent on the thermal design of the PCB. As a result, the maximum continuous output power attainable will be influenced by the PCB design. The continuous power rating is lower than the peak output power capability of the device. TPA3250 peak power rating is based on the burst capability of the device. The peak to average power ratio of TPA3250 is well suited to handle even demanding audio playback without thermal shutdown. Thermal performance with typical audio content (burst) versus sine wave content (continuous) should be considered when defining the thermal test requirements for the end product.

11.4.2 Thermal Performance with Continuous Output Power

It is recommended to operate TPA3250 below the OTW threshold, which in most systems will require the average output power to be below the maximum peak output power. The maximum continuous power TPA3250 will deliver depends directly on the thermal design of the PCB and for the entire system (closed box with no air flow, or a fanned system etc.). Thermal performance is also impacted by PVDD voltage and switching frequency. The best configuration for a given application will often depend on the continuous output power requirements.

Table 12. Device and PCB Temperatures with 8-Ω Load, TA = 40°C

TA = 40°C, TPA3250 EVM, No Airflow. Steady State Temperatures.
PVDD Switching Frequency Continuous Power [W] Device Top Temperature Maximum PCB Temperature Comment
32V 450kHz 73W 10% THD 114°C 89°C
32V 450kHz 18W 1/4 of 10% THD power 87°C 71°C
32V 450kHz 9W 1/8 of 10% THD power 77°C 65°C
32V 600kHz 72W 10% THD 128°C 98°C OTW after 236 seconds
32V 600kHz 18W 1/4 of 10% THD power 105°C 84°C
32V 600kHz 9W 1/8 of 10% THD power 85°C 70°C
36V 450kHz 92W 10% THD 150°C 113°C OTW after 95 seconds
36V 450kHz 23W 1/4 of 10% THD power 111°C 87°C
36V 450kHz 11.5W 1/8 of 10% THD power 79°C 71°C
36V 600kHz 91W 10% THD OTE(1) OTW after 3 seconds. Not recommended.
36V 600kHz 22.5W 1/4 of 10% THD power 144°C 109°C OTW after 152 seconds
36V 600kHz 11.5W 1/8 of 10% THD power 115°C 90°C
(1) Steady state data is not available because device heats up to OTE in this condition.

Table 13. Device and PCB Temperatures with 4-Ω Load, TA = 40°C

TA = 40°C, TPA3250 EVM, No Airflow. Steady State Temperatures.
PVDD Switching Frequency Continuous Power [W] Device Top Temperature Maximum PCB Temperature Comment
32V 450kHz 130W 10% THD OTE OTW after 1 second.Not recommended.
32V 450kHz 32.5W 1/4 of 10% THD power 147°C 111°C OTW after 92 seconds. Not recommended.
32V 450kHz 16W 1/8 of 10% THD power 107°C 85°C
32V 600kHz 130W 10% THD OTE(1) OTW after 1 second. Not recommended.
32V 600kHz 32.5W 1/4 of 10% THD power OTE(1) OTW after 29 seconds. Not recommended.
32V 600kHz 16W 1/8 of 10% THD power 147°C 99°C OTW after 92 seconds. Not recommended.
36V 450kHz 165W 10% THD OTE(1) OTW after 0 seconds. Not recommended.
36V 450kHz 41W 1/4 of 10% THD power OTE(1) OTW after 11 seconds. Not recommended.
36V 450kHz 21W 1/8 of 10% THD power 142°C 108°C OTW after 134 seconds. Not recommended.
36V 600kHz Not recommended
(1) Steady state data is not available because device heats up to OTE in this condition.

11.4.3 Thermal Performance with Non-Continuous Output Power

As audio signals often have a peak to average ratio larger than one (average level below maximum peak output), the thermal performance for audio signals can be illustrated using burst signals with different burst ratios.

TPA3250 MusicExample.gif Figure 26. Example of audio signal

A burst signal is characterized by the high-level to low-level ratio as well as the duration of the high level and low level, e.g. a burst 1:4 stimuli is a single period of high level followed by 4 cycles of low level.

TPA3250 Burst.gif Figure 27. Example of 1:4 Burst Signal

The following analysis of thermal performance for TPA3250 is made with the TPA3250 EVM surrounded by still air (no airflow) with a controlled air temperature of 40°C. For 32-V operation the system is not thermally limited with 8Ω load, but depending on the burst stimuli for operation at 36V some thermal limitations may occur, depending on switching frequency and average to maximum power ratio. Low to maximum power ratio of the burst stimuli is given in the plots as for example P1:8 which equals 1 cycle of full power followed by 8 cycles of low power.

TPA3250 D022_SLASE99.gif
PVDD = 32V, fs = 450kHz RL = 8Ω TA = 40°C
Figure 28. Device and PCB Temperatures vs. Burst Ratio
TPA3250 D023_SLASE99.gif
PVDD = 36V, fs = 450kHz RL = 8Ω TA = 40°C
Figure 30. Device and PCB Temperatures vs. Burst Ratio
TPA3250 D021_SLASE99.gif
PVDD = 32V, fs = 600kHz RL = 8Ω TA = 40°C
Figure 29. Device and PCB Temperatures vs. Burst Ratio
TPA3250 D024_SLASE99.gif
PVDD = 36V, fs = 600kHz RL = 8Ω TA = 40°C
Figure 31. Device and PCB Temperatures vs. Burst Ratio