SLOS313C December   2000  – March 2016 TPA6111A2

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  DC Electrical Characteristics, VDD = 3.3 V
    6. 7.6  AC Operating Characteristics, VDD = 3.3 V
    7. 7.7  DC Electrical Characteristics, VDD = 5.5 V
    8. 7.8  AC Operating Characteristics, VDD = 5.5 V
    9. 7.9  AC Operating Characteristics, VDD = 3.3 V
    10. 7.10 AC Operating Characteristics, VDD = 5 V
    11. 7.11 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 5-V Versus 3.3-V Operation
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Gain Setting Resistors, RF and Ri
        2. 10.2.2.2 Input Capacitor, Ci
        3. 10.2.2.3 Power Supply Decoupling, C(S)
        4. 10.2.2.4 Midrail Bypass Capacitor, C(BYP)
        5. 10.2.2.5 Output Coupling Capacitor, C(C)
        6. 10.2.2.6 Using Low-ESR Capacitors
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|8
  • DGN|8
サーマルパッド・メカニカル・データ
発注情報

6 Pin Configuration and Functions

D or DGN Package
8-Pin SOIC or MSOP
Top View
TPA6111A2 pinout_los313.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
BYPASS 3 I Tap to voltage divider for internal mid-supply bias supply. Connect to a 0.1-µF to 1-µF low ESR capacitor for best performance.
GND 4 I GND is the ground connection.
IN1– 2 I IN1– is the inverting input for channel 1.
IN2– 6 I IN2– is the inverting input for channel 2.
SHUTDOWN 5 I Puts the device in a low quiescent current mode when held high
VDD 8 I VDD is the supply voltage terminal.
VO1 1 O VO1 is the audio output for channel 1.
VO2 7 O VO2 is the audio output for channel 2.