JAJSHI6G June 2018 – July 2021 TPS25830-Q1 , TPS25831-Q1
PRODUCTION DATA
- 1 特長
- 2 アプリケーション
- 3 概要
- 4 Revision History
- 5 概要 (続き)
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
- 8 Specifications
- 9 Parameter Measurement Information
-
10Detailed Description
- 10.1 Overview
- 10.2 Functional Block Diagram
- 10.3
Feature Description
- 10.3.1 Buck Regulator
- 10.3.2 Enable/UVLO and Start-up
- 10.3.3 Switching Frequency and Synchronization (RT/SYNC)
- 10.3.4 Spread-Spectrum Operation
- 10.3.5 VCC, VCC_UVLO
- 10.3.6 Minimum ON-time, Minimum OFF-time
- 10.3.7 Internal Compensation
- 10.3.8 Bootstrap Voltage (BOOT)
- 10.3.9 RSNS, RSET, RILIMIT and RIMON
- 10.3.10 Overcurrent and Short Circuit Protection
- 10.3.11 Overvoltage, IEC and Short to Battery Protection
- 10.3.12 Cable Compensation
- 10.3.13 USB Port Control
- 10.3.14 FAULT Response
- 10.3.15 USB Specification Overview
- 10.3.16 USB Type-C® Basics
- 10.3.17 Device Power Pins (IN, CSN/OUT, and PGND)
- 10.3.18 Thermal Shutdown
- 10.3.19 Power Wake
- 10.3.20 Thermal Sensing with NTC (TPS25831-Q1)
- 10.4
Device Functional Modes
- 10.4.1 Shutdown Mode
- 10.4.2 Standby Mode
- 10.4.3 Active Mode
- 10.4.4 Device Truth Table (TT)
- 10.4.5 USB Port Operating Modes
- 10.4.6 High-Bandwidth Data-Line Switches (TPS25830-Q1 only)
-
11Application and Implementation
- 11.1 Application Information
- 11.2
Typical Application
- 11.2.1 Design Requirements
- 11.2.2
Detailed Design Procedure
- 11.2.2.1 Output Voltage
- 11.2.2.2 Switching Frequency
- 11.2.2.3 Inductor Selection
- 11.2.2.4 Output Capacitor Selection
- 11.2.2.5 Input Capacitor Selection
- 11.2.2.6 Bootstrap Capacitor Selection
- 11.2.2.7 VCC Capacitor Selection
- 11.2.2.8 Enable and Undervoltage Lockout Set-Point
- 11.2.2.9 Current Limit Set-Point
- 11.2.2.10 Cable Compensation Set-Point
- 11.2.2.11 LD_DET, POL, and FAULT Resistor Selection
- 11.2.3 Application Curves
- 12Power Supply Recommendations
- 13Layout
- 14Device and Documentation Support
- 15Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ（パッケージ｜ピン）
- RHB|32
サーマルパッド・メカニカル・データ
- RHB|32
発注情報
8.8 Typical Characteristics
Unless otherwise specified the following conditions apply: VIN = 13.5 V, fSW = 400 kHz, L = 10 µH, COUT_CSP = 66 µF, COUT_CSN = 0.1 µF, CBUS = 1 µF, TA = 25 °C.
| VCSN = 8 V | CC1= Rd | ||
| EN = 0 V |
Figure 8-5 VIN UVLO Threshold
| RIMON = 0 Ω |
Figure 8-9 High-side MOSFET on Resistance vs Junction Temperature
| RT = 49.9kΩ |
| RSNS = 15 mΩ | RSET = 300 Ω |
Figure 8-15 LS_GD Gate Source Current vs Junction Temperature
| RSNS = 15 mΩ | RSET = 300 Ω | RIMON = 13 kΩ |
Figure 8-19 VBUS Discharge Resistance vs Junction Temperature
Figure 8-21 DP_IN Overvoltage Protection Threshold vs Junction Temperature
| VCONN = 5V |
Figure 8-25 CC Sourcing Current vs Junction Temperature
Figure 8-27 NTC Temperature Warning Threshold (TPS25831-Q1)
| Measured Source with 10-cm cable |
Figure 8-31 Data Transmission Characteristics vs Frequency (TPS25830-Q1)
Figure 8-33 On-State Cross-Channel Isolation vs Frequency (TPS25830-Q1)
| CC1 = OPEN | CC2 = OPEN |
Figure 8-4 Precision Enable Threshold
Figure 8-6 VCC vs Input Voltage
Figure 8-8 High-side Current Limit vs Input Voltage
Figure 8-10 Low-side MOSFET on Resistance vs Junction Temperature
| RT = 8.87kΩ |
| RSNS = 15 mΩ | RSET = 300 Ω |
| VCSN/OUT = 5.1V | RIMON = 0kΩ |
| RSNS = 15 mΩ | RSET = 300 Ω | RIMON = 13 kΩ |
Figure 8-20 VBUS Overvoltage Protection Threshold vs Junction Temperature
Figure 8-22 DM_IN Overvoltage Protection Threshold vs Junction Temperature
| VCONN = 5V |
Figure 8-26 CC1 Overvoltage Protection Threshold vs Junction Temperature
Figure 8-28 NTC Temperature Shutdown Threshold (TPS25831-Q1)
| Measured on TPS25830-Q1 EVM with 10-cm cable |
Figure 8-32 Off-State Data-Switch Isolation vs Frequency (TPS25830-Q1)