JAJSQQ7 july   2023 TPS38700S-Q1

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Device State Diagram
      2. 8.3.2 Sync Functionality
      3. 8.3.3 Transitioning Sequences
        1. 8.3.3.1 Power Up
        2. 8.3.3.2 Power Down
        3. 8.3.3.3 Emergency Power Down
      4. 8.3.4 BACKUP State
      5. 8.3.5 Thermal Shutdown (TSD) State
      6. 8.3.6 I2C
        1. 8.3.6.1 I2C
    4. 8.4 Register Map Table
      1. 8.4.1 Register Descriptions
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Automotive Multichannel Sequencer and Monitor
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
      4. 9.2.4 Test Implementation
      5. 9.2.5 Application Curves
  11. 10Power Supply Recommendations
    1. 10.1 Power Supply Guidelines
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 サポート・リソース
    4. 12.4 Trademarks
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 用語集
  14.   Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics

At 2.2 V ≤  VDD ≤ 5.5 V, NRST/NIRQ Voltage = 10 kΩ to VDD, NRST/NIRQ load = 10 pF, and over the operating free-air temperature range of – 40°C to 125°C, unless otherwise noted. Typical values are at TA = 25°C, typical conditions at       VDD= 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Common Parameters
VDD Input supply voltage  2.2 5.5 V
VBBAT Backup battery voltage range 1.85 5.5 V
UVLO_VDDR UVLO VDD Rising threshold 2.2 V
UVLO_VDDF UVLO VDD Falling threshold/switch over to VBBAT 1.90 2 V
UVLO_VBBAT UVLO Battery backup Falling threshold 1.85 V
POR Power ON reset voltage, all outputs guaranteed to be stable above this value Falling threshold 1.39 V
IDD Supply current into VDD pin
ACT=High
 
VDD ≤ 5.5 V, power up sequence complete 45 75 µA
IDD Supply current into VDD pin
ACT=Low
VDD ≤ 5.5 V ,power down sequence complete
 
35 60 µA
IBBAT Supply current from VBBAT VBBAT ≤ 5.5 V 35 60 µA
ILKG_NRST Output leakage current (NRST) VDD=VNRST = 5.5 V 300 nA
ILKG_NIRQ Output leakage current (NIRQ) VDD=VNIRQ = 5.5 V 300 nA
ACT_L Logic Low input  0.36 V
ACT_H Logic high input  0.84 VDD - 0.2 V
SYNC_H Input High Io = 1mA 1.1 V
SYNC_L Input Low Io = 1mA 0.36 V
ACT Internal Pull down 100 kΩ
NRST Output Low Open-Drain (10 kΩ pull up) 0.1 V
NIRQ Output Low Open-Drain (10 kΩ pull up) 0.1 V
ENx Output Low Open-Drain (10 kΩ pull up) 0.1 V
GPOx Output Low Open-Drain (10 kΩ pull up) 0.1 V
OSC Internal oscillator tolerance -5 5 %
Ilkg(BBAT) Leakge current from VBBAT VBBAT > 1.85V 300 nA
TSD Thermal Shutdown 165
TSD Hysterisis Thermal Shutdown Hysteresis 25
I2C Electrical Specifications
CB Capacitive load for SDA and SCL 400 pF
SDA, SCL Low Threshold, OTP = 3.3 V 0.84 V
SDA, SCL Low Threshold, OTP = 3.3 V 2.31 V
SDA Output Low with 3 mA sink current 0.2 V