JAJSDP9A August   2017  – September 2017 TPS7A88-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Voltage Regulation Features
        1. 7.3.1.1 DC Regulation
        2. 7.3.1.2 AC and Transient Response
      2. 7.3.2 System Start-Up Features
        1. 7.3.2.1 Programmable Soft-Start (NR/SSx)
        2. 7.3.2.2 Sequencing
          1. 7.3.2.2.1 Enable (ENx)
          2. 7.3.2.2.2 Undervoltage Lockout (UVLOx) Control
          3. 7.3.2.2.3 Active Discharge
        3. 7.3.2.3 Power-Good Output (PGx)
      3. 7.3.3 Internal Protection Features
        1. 7.3.3.1 Foldback Current Limit (ICLx)
        2. 7.3.3.2 Thermal Protection (Tsdx)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Regulation
      2. 7.4.2 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Component Selection
        1. 8.1.1.1 Setting the Output Voltage (Adjustable Operation)
        2. 8.1.1.2 Capacitor Recommendations
        3. 8.1.1.3 Input and Output Capacitor (CINx and COUTx)
        4. 8.1.1.4 Feedforward Capacitor (CFFx)
        5. 8.1.1.5 Noise-Reduction and Soft-Start Capacitor (CNR/SSx)
      2. 8.1.2 Start-Up
        1. 8.1.2.1 Circuit Soft-Start Control (NR/SSx)
          1. 8.1.2.1.1 In-Rush Current
        2. 8.1.2.2 Undervoltage Lockout (UVLOx) Control
        3. 8.1.2.3 Power-Good (PGx) Function
      3. 8.1.3 AC and Transient Performance
        1. 8.1.3.1 Power-Supply Rejection Ratio (PSRR)
        2. 8.1.3.2 Channel-to-Channel Output Isolation and Crosstalk
        3. 8.1.3.3 Output Voltage Noise
        4. 8.1.3.4 Optimizing Noise and PSRR
          1. 8.1.3.4.1 Charge Pump Noise
        5. 8.1.3.5 Load Transient Response
      4. 8.1.4 DC Performance
        1. 8.1.4.1 Output Voltage Accuracy (VOUTx)
        2. 8.1.4.2 Dropout Voltage (VDO)
          1. 8.1.4.2.1 Behavior When Transitioning From Dropout Into Regulation
      5. 8.1.5 Reverse Current Protection
      6. 8.1.6 Power Dissipation (PD)
        1. 8.1.6.1 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 評価モジュール
        2. 11.1.1.2 SPICEモデル
      2. 11.1.2 デバイスの項目表記
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • RTJ|20
サーマルパッド・メカニカル・データ
発注情報

Specifications

Absolute Maximum Ratings

over operating junction temperature range and all voltages with respect to GND (unless otherwise noted)(1) (3)
MIN MAX UNIT
Voltage INx, PGx, ENx –0.3 7 V
OUTx , SS_CTRLx –0.3 VINx + 0.3(2)
NR/SSx, FBx –0.3 3.6
Current OUTx Internally limited Internally limited A
PGx (sink current into device) 5 mA
Operating junction temperature, TJ –55 150 °C
Storage temperature, Tstg –55 150 °C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The absolute maximum rating is VINx + 0.3 V or 7 V, whichever is smaller.
Lowercase x indicates that the specification under consideration applies to both channel 1 and channel 2, one channel at a time.

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 ±750
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)
MIN MAX UNIT
VINx Input supply voltage range 1.4 6.5 V
IOUTx Output current 0 1 A
CINx Input capacitor, each input 10 µF
COUTx Output capacitor, each output 10 µF
CNR/SSx Noise-reduction capacitor 1 µF
RPG Power-good pullup resistance 10 100
TJ Junction temperature range –40 140 °C

Thermal Information

THERMAL METRIC(1) TPS7A88-Q1 UNIT
RTJ (WQFN)
20 PINS
RθJA Junction-to-ambient thermal resistance 39.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 27.7 °C/W
RθJB Junction-to-board thermal resistance 16.9 °C/W
ψJT Junction-to-top characterization parameter 0.3 °C/W
ψJB Junction-to-board characterization parameter 16.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.5 °C/W
For more information about traditional and new thermal metrics, see theSemiconductor and IC Package Thermal Metrics application report.

Electrical Characteristics

over operating temperature range (TJ = –40°C to +140°C), VINx = 1.4 V, VOUTx(TARGET) = 0.8 V, IOUTx = 5 mA, VENx = 1.4 V, COUTx = 10 μF, CNR/SSx = 0 nF, CFFx = 0 nF, SS_CTRLx = GND, PGx pin pulled up to VINx with 100 kΩ, and for each channel; typical values are at TJ = 25°C (3) (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VINx Input supply voltage range 1.4 6.5 V
VREF Reference voltage 0.8 V
VUVLO Input supply UVLO VINx rising 1.31 1.39 V
VHYS VUVLO Hysteresis 290 mV
VOUTx Output voltage range TJ = –40°C to +125°C 0.8 – 1% 5.15 + 1% V
0.8 – 1.5% 5.15 + 1%
Output voltage accuracy(1)(2) 0.8 V ≤ VOUTx ≤ 5.15 V
5 mA ≤ IOUTx ≤ 1 A
TJ = –40°C to +125°C
–1% 1%
0.8 V ≤ VOUTx ≤ 5.15 V
5 mA ≤ IOUTx ≤ 1 A   
–1.5% 1%
ΔVOUTx(ΔVINx) Line regulation IOUTx= 5 mA
1.4 V ≤ VINx ≤ 6.5 V
0.003 %/V
ΔVOUTx(ΔIOUTx) Load regulation 5 mA ≤ IOUTx ≤ 1 A 0.03 %/A
VDO Dropout voltage VINx ≥ 1.4 V
0.8 V ≤ VOUTx ≤ 5.15 V
IOUTx = 1 A
VFBx = 0.8 V – 3%,  TJ = –40°C to +125°C
225 mV
VINx ≥ 1.4 V, 0.8 V ≤ VOUTx ≤ 5.15 V,
IOUTx = 1 A, VFBx = 0.8 V – 3%
250 mV
ILIM Output current limit VOUTx forced at 0.9 × VOUTx(TARGET),
VINx = VOUTx(TARGET) + 300 mV
1.5 1.7 1.9 A
IGND GND pin current Both channels enabled, per channel
VINx = 6.5 V, IOUTx = 5 mA
2.1 3.5 mA
Both channels enabled, per channel
VINx = 1.4 V, IOUTx = 1 A
4
ISDN Shutdown GND pin current Both channels shutdown, per channel, PGx = (open)
VINx = 6.5 V
VENx = 0.4 V
0.1 15 μA
IENx ENx pin current VINx = 6.5 V
0 V ≤ VENx ≤ 6.5 V
–0.5 0.5 μA
VIL(ENx) ENx pin low-level input voltage (device disabled) 0 0.4 V
VIH(ENx) ENx pin high-level input voltage (device enabled) 1.1 6.5 V
ISS_CTRLx SS_CTRLx pin current VINx = 6.5 V
0 V ≤ VSS_CTRLx ≤ 6.5 V
–0.2 0.2 μA
VIT(PGx) PGx pin threshold For PGx transitioning low with falling VOUTx; expressed as a percentage of VOUTx(TARGET) 82% 88.9% 93%
Vhys(PGx) PGx pin hysteresis For PGx transitioning high with rising VOUTx; expressed as a percentage of VOUTx(TARGET) 1%
VOL(PGx) PGx pin low-level output voltage VOUTx < VIT(PGx), IPGx = –1 mA (current into device) 0.4 V
Ilkg(PGx) PGx pin leakage current VOUTx > VIT(PGx)
VPGx = 6.5 V
1 µA
INR/SSx NR/SSx pin charging current VNR/SSx = GND
1.4 V ≤ VINx ≤ 6.5 V
VSS_CTRLx = GND
4 6.2 10 µA
VNR/SSx = GND
1.4 V ≤ VINx ≤ 6.5 V
VSS_CTRLx = VINx
65 100 150
IFBx FBx pin leakage current VINx = 6.5 V
VFBx = 0.8 V
–100 100 nA
PSRR Power-supply ripple rejection f = 500 kHz
VINx = 3.8 V
VOUTx = 3.3 V
IOUTx = 750 mA
CNR/SSx = 10 nF
CFFx = 10 nF
40 dB
Vn Output noise voltage BW = 10 Hz to 100 kHz
VINx = 1.8 V
VOUTx = 0.8 V
IOUTx = 1 A
CNR/SSx = 1 µF
CFFx = 100 nF
3.8 μVRMS
Noise spectral density f = 10 kHz
VINx = 1.8 V
VOUTx = 0.8 V
IOUTx = 1 A
CNR/SSx = 10 nF
CFFx = 10 nF
11 nV/√Hz
Rdiss Output active discharge resistance VENx = GND 250 Ω
Tsd Thermal shutdown temperature Shutdown, temperature increasing 160 °C
Reset, temperature decreasing 140
When the device is connected to external feedback resistors at the FBx pin, external resistor tolerances are not included.
The device is not tested under conditions where VINx > VOUTx + 2.5 V and IOUTx = 1 A; the power dissipation is higher than the maximum rating of the package. This accuracy specification does not apply on any application condition that exceeds the power dissipation limit of the package under test.
Lowercase x indicates that the specification under consideration applies to both channel 1 and channel 2, one channel at a time.

Typical Characteristics

at TJ = 25°C, 1.4 V ≤ VINx < 6.5 V, VINx ≥ VOUTx(TARGET) + 0.3 V, VOUTx = 0.8 V, SS_CTRLx = GND, IOUTx = 5 mA, VENx = 1.1 V, COUTx = 10 μF, CNR/SSx = 0 nF, CFFx = 0 nF, PGx pin pulled up to VOUTx with 100 kΩ, and SS_CTRLx = GND (unless otherwise noted)
TPS7A88-Q1 D021_SBVS248.gif
VOUTx = 1.2 V, VINx = VENx = 1.7 V
COUTx = 10 µF CNR/SSx = CFFx = 10 nF
Figure 1. Power-Supply Rejection vs Output Current
TPS7A88-Q1 D020_SBVS248.gif
VOUTx = 1.2 V, IOUTx = 1.0 A, COUTx = 10 µF,
CNR/SSx = CFFx = 10 nF
Figure 3. Power-Supply Rejection vs Input Voltage
TPS7A88-Q1 D025_SBVS248.gif
VOUTx = 1.2 V, VINx = VENx = 1.7 V, IOUTx = 1 A, CFFx = 10 nF
Figure 5. Power-Supply Rejection vs Output Capacitance
TPS7A88-Q1 D026_SBVS248.gif
VOUTx = 1.8 V, IOUTx = 100 mA, COUTx = 10 µF,
CNR/SSx = CFFx = 10 nF
Figure 7. Channel-to-Channel Output Voltage Isolation vs Frequency
TPS7A88-Q1 D029_SBVS248.gif
VINx = 1.7 V, VOUTx = 1.2 V, IOUTx = 1A, VRMS BW = 10 Hz to 100 kHz, COUTx = 10 µF, CFFx = 10 nF
Figure 9. Spectral Noise Density vs CNR/SSx
TPS7A88-Q1 D028_SBVS248.gif
VOUTx = 1.2 V, IOUTx = 1 A, COUTx = 10 µF, CNR/SSx = 10 nF
Figure 11. Spectral Noise Density vs VINx
TPS7A88-Q1 D037_SBVS248.gif
VOUTx = 1.8 V, IOUTx = 1 A, CFFx = 0.01 µF,
BW = 10 Hz to 100 kHz
Figure 13. RMS Output Noise vs CNR/SSx
TPS7A88-Q1 sbvs248_VOUTTrans1_2.gif
VINx = 1.5 V, VOUTx = 1.2 V, IOUTx = 100 mA to 1 A to 100 mA at 1 A/µs, COUTx = 10 µF
Figure 15. Load Transient Response
TPS7A88-Q1 sbvs248_line_trans.gif
VINx = 1.4 V to 6.5 V to 1.4 V at 2 V/µs, VOUTx = 0.8 V,
IOUTx = 1 A, CNR/SSx = CFFx = 10 nF
Figure 17. Line Transient
TPS7A88-Q1 sbvs248_startup_01_GND.gif
VINx = 1.4 V, SS_CTRLx = GND, CNR/SSx = 10 nF
Figure 19. Start-Up
TPS7A88-Q1 sbvs248_startup_1_VIN.gif
VINx = 1.4 V, SS_CTRLx = VINx, CNR/SSx = 1 µF
Figure 21. Start-Up
TPS7A88-Q1 D001-SBVS289-10.gif
IOUTx = 1 A. VFB = 95% × VFB(nom)
Figure 23. Dropout Voltage vs Input Voltage
TPS7A88-Q1 D001-SBVS289-21.gif
VINx = 1.4 V, VOUTx = 0.8 V
Figure 25. Load Regulation
TPS7A88-Q1 D001-SBVS289-18.gif
VINx = 3.6 V, VOUTx = 3.3 V
Figure 27. Load Regulation
TPS7A88-Q1 D001-SBVS289-19.gif
VINx = 5.3 V, VOUTx = 5 V
Figure 29. Load Regulation
TPS7A88-Q1 D001-SBVS289-02.gif
Both channels enabled
Figure 31. Ground Current vs Input Voltage
TPS7A88-Q1 D001-SBVS289-14.gif
VINx = 1.4 V, 6.5 V
Figure 33. PG Low Level vs Temperature
TPS7A88-Q1 D001-SBVS289-13.gif
VINx = VPGx = 6.5 V
Figure 35. PG Leakage Current vs Temperature
TPS7A88-Q1 D001-SBVS289-17.gif
SS_CTRLx = VINx
Figure 37. Soft-Start Current vs Temperature
TPS7A88-Q1 D001-SBVS289-15.gif
Figure 39. Input UVLO Threshold vs Temperature
TPS7A88-Q1 D024_SBVS248.gif
VOUTx = 1.2 V, VINx = VENx = 1.7 V, IOUTx = 1 A, COUTx = 10 µF, CFFx = 10 nF
Figure 2. Power-Supply Rejection vs CNR/SSx
TPS7A88-Q1 D023_SBVS248.gif
VOUTx = 3.3 V, VINx = VENx = 3.8 V, COUTx = 10 µF, CNR/SSx = CFFx = 10 nF
Figure 4. Power-Supply Rejection vs Output Current
TPS7A88-Q1 D022_SBVS248.gif
VOUTx = 3.3 V, IOUTx = 1 A, COUTx = 10 µF, CNR/SSx = CFFx = 10 nF
Figure 6. Power-Supply Rejection vs Input Voltage
TPS7A88-Q1 D027_SBVS248.gif
VINx = VOUTx + 1 V, IOUTx = 1 A, VRMS BW = 10 Hz to 100 kHz, COUTx = 10 µF, CNR/SSx = CFFx = 10 nF
Figure 8. Spectral Noise Density vs Output Voltage
TPS7A88-Q1 D035_SBVS248.gif
VINx = 3.8 V, VOUTx = 3.3 V, IOUTx = 1 A, VRMS BW = 10 Hz to 100 kHz, COUTx = 10 µF, CNR/SSx = 10 nF
Figure 10. Spectral Noise Density vs CFFx
TPS7A88-Q1 D036_SBVS248.gif
VOUTx = 1.8 V, IOUTx = 1 A, VRMS BW = 10 Hz to 100 kHz,
CFFx = 0.01 µF
Figure 12. Spectral Noise Density vs COUTx
TPS7A88-Q1 D038_SBVS248.gif
VOUTx = 1.8 V, IOUTx = 1 A, CNR/SSx = 1 µF,
BW = 10 Hz to 100 kHz
Figure 14. RMS Output Noise vs CFFx
TPS7A88-Q1 sbvs248_VOUTTrans5_0.gif
VINx = 5.5 V, VOUTx = 5.0 V, IOUTx = 100 mA to 1 A to 100 mA at 1 A/µs, COUTx = 10 µF
Figure 16. Load Transient Response ()
TPS7A88-Q1 sbvs248_startup_0_GNDr.gif
VINx = 1.4 V, SS_CTRLx = GND, CNR/SSx = 0 nF
Figure 18. Start-Up
TPS7A88-Q1 sbvs248_startup_01_VIN.gif
VINx = 1.4 V, SS_CTRLx = VINx, CNR/SSx = 10 nF
Figure 20. Start-Up
TPS7A88-Q1 D001-SBVS289-09.gif
VINx = 5.5 V. VFB = 95% × VFB(nom)
Figure 22. Dropout Voltage vs Output Current
TPS7A88-Q1 D001-SBVS289-01.gif
Both channels
Figure 24. Shutdown Current vs Input Voltage
TPS7A88-Q1 D001-SBVS289-05.gif
VOUTx = 0.8 V, IOUTx = 50 mA
Figure 26. Line Regulation
TPS7A88-Q1 D001-SBVS289-06.gif
VOUTx = 3.3 V, IOUTx = 10 mA
Figure 28. Line Regulation
TPS7A88-Q1 D001-SBVS289-07.gif
VOUTx = 5 V, IOUTx = 5 mA
Figure 30. Line Regulation
TPS7A88-Q1 D001-SBVS289-03.gif
Both channels enabled
Figure 32. Ground Current vs Output Current
TPS7A88-Q1 D001-SBVS289-12.gif
VINx = 1.4 V, 6.5 V
Figure 34. PG Threshold vs Temperature
TPS7A88-Q1 D001-SBVS289-16.gif
SS_CTRLx = GND
Figure 36. Soft-Start Current vs Temperature
TPS7A88-Q1 D001-SBVS289-11.gif
VINx = 1.4 V
Figure 38. Enable Threshold vs Temperature
TPS7A88-Q1 D001-SBVS289-12.gif
VINx = 1.4 V
Figure 40. PG Threshold vs Temperature