JAJSC12D October   2013  – April 2018

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      可変出力オプション
      2.      固定出力オプション
  4. 改訂履歴
  5. 概要(続き)
  6. Device Comparison
  7. Pin Configuration and Functions
    1.     Pin Functions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Enable (EN)
      2. 9.3.2 Regulated Output (VOUT)
      3. 9.3.3 Power-On-Reset (RESET)
      4. 9.3.4 Reset Delay Timer (DELAY)
      5. 9.3.5 Adjustable Output Voltage (ADJ for TPS7B6701)
      6. 9.3.6 Undervoltage Shutdown
      7. 9.3.7 Thermal Shutdown
      8. 9.3.8 Thermal Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation With VIN < 4 V
      2. 9.4.2 Operation With EN Control
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Power Dissipation and Thermal Considerations
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Dropout Recovery
      1. 11.1.1 LDO Dropout Recovery Explained
      2. 11.1.2 TPS7B67xx-Q1 Dropout During Startup
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Enhanced Thermal Pad
      2. 12.1.2 Package Mounting
      3. 12.1.3 Board Layout Recommendations to Improve PSRR and Noise Performance
      4. 12.1.4 Additional Layout Considerations
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 関連リンク
    2. 13.2 ドキュメントの更新通知を受け取る方法
    3. 13.3 コミュニティ・リソース
    4. 13.4 商標
    5. 13.5 静電気放電に関する注意事項
    6. 13.6 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1)(2) ±2000 V
Charged-device model (CDM), per AEC Q100-011 All pins ±500
Corner pins (1, 10, 11, and 20) ±750
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
The human body model is a 107-pF capacitor discharged through a 1.5-kΩ resistor into each pin.