The TPS7H2140-SEP can be configured in parallel operation either to increase the current capability, up to 5.4 A, or to reduce the R_ON (on-state resistance). Any channels combination can be parallel by connecting the desired channels outputs (OUTx) and enable (ENx) signals together. Figure 8-16 shows the input/output connections when paralleling all 4 channels of the TPS7H2140-SEP

Figure 8-16 Input and Output Connections when paralleling all channels in the TPS7H2140-SEP

For proper device operation follow the following recommendations:

1. Connect the ENx inputs signals of the channels to be parallel together and as close to the device (I.C.) as possible.
2. Connect the OUTx output signals of the channels to be parallel together and as close to the device (I.C.) as possible.
3. Take in consideration the deviations (or errors) in the R_ON, current limit and voltage clamp for the system design.

Due to imbalance of currents in each channel (due to ΔR_ON) the total load current is not equally distributed. The channel current bounds are:

• Equation 13. ${\mathrm{I}}_{\mathrm{n}}\left(\mathrm{m}\mathrm{a}\mathrm{x}\right)=\frac{{\mathrm{I}}_{\mathrm{L}\mathrm{O}\mathrm{A}\mathrm{D}}\mathrm{ }\mathrm{ }\mathrm{ }}{\mathrm{N}}\mathrm{ }\times \mathrm{ }\left(\frac{1+\mathrm{ }∆{\mathrm{R}}_{\mathrm{O}\mathrm{N}}}{1-\mathrm{ }∆{\mathrm{R}}_{\mathrm{O}\mathrm{N}}}\right)$
• Equation 14. ${\mathrm{I}}_{\mathrm{n}}\left(\mathrm{m}\mathrm{i}\mathrm{n}\right)=\frac{{\mathrm{I}}_{\mathrm{L}\mathrm{O}\mathrm{A}\mathrm{D}}\mathrm{ }\mathrm{ }\mathrm{ }}{\mathrm{N}}\mathrm{ }\times \mathrm{ }\left(\frac{1-\mathrm{ }∆{\mathrm{R}}_{\mathrm{O}\mathrm{N}}}{1+\mathrm{ }∆{\mathrm{R}}_{\mathrm{O}\mathrm{N}}}\right)$

where N is equal to the # of parallel channels and ΔR_ON is the difference between the on-state resistance for any given channel.

At 25 °C the ΔR_ON maximum value is specified at 6 % (or 0.06), using this value and assuming the I_LOAD is 5 A the current by each channel can be calculated (using Equation 13and Equation 14) as:

When paralleling channels is important to known that the current limit is programmed per channel based (or the same for all channels). The sensed current ratio on the current limit circuit have variations (as specified by dK_CL/K_CL). To deliver the expected load before reaching the current limit the designer most account for variation on the sensed current gain and variations on the channels currents due to on-resistance mismatch as described before. To select the current limit resistor when accounting for all system errors (ΔR_ON and dK_CL/K_CL) use:

As the sensed current is measured in a per channel based and reported on the CS pin. To measured the total load current of parallel channels, the individual current most be measured and added together. The individual currents are measured by using the SEH and SEL (mux inputs) in conjunction with the CS voltage.

The diagnostics as specified by Fault Table are globally reported, as the fault conditions affects all channels simultaneously. When using the internal clamp (V_{DS_CLAMP}) to dissipate the inductive kick-back energy the energy most be limited to the maximum of a single channel.