JAJSEJ4C January   2018  – July 2018 TPSM84209

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      アプリケーション概略図
      2.      効率と出力電流との関係
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics (VIN = 5 V)
    7. 6.7 Typical Characteristics (VIN = 12 V)
    8. 6.8 Typical Characteristics (VIN = 24 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Input Capacitor Selection
      3. 7.3.3  Undervoltage Lockout (UVLO)
      4. 7.3.4  Output Capacitor Selection
      5. 7.3.5  Feed-Forward Capacitor
      6. 7.3.6  Operating Range
      7. 7.3.7  Output Current Rating
      8. 7.3.8  Enable (EN)
      9. 7.3.9  Internal Soft Start
      10. 7.3.10 Safe Start-Up Into Prebiased Outputs
      11. 7.3.11 Light Load Efficiency / Eco-Mode
      12. 7.3.12 Voltage Dropout
      13. 7.3.13 Overcurrent Protection
      14. 7.3.14 Output Overvoltage Protection (OVP)
      15. 7.3.15 Thermal Performance
      16. 7.3.16 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Eco-Mode Operation
      3. 7.4.3 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitors
        5. 8.2.2.5 Enable Control
      3. 8.2.3 Application Waveforms
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 EMI
      1. 10.3.1 EMI Plots
    4. 10.4 Package Specifications
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
    2. 11.2 WEBENCH®ツールによるカスタム設計
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報
    1. 12.1 Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • RKH|9
サーマルパッド・メカニカル・データ
発注情報

7.1 Overview

The TPSM84209 is a highly integrated 28-V input, 2.5-A, synchronous step-down power module with PWM, MOSFETs, inductor, and control circuitry integrated into a low-profile, overmolded, QFN package. This device enables small designs by integrating all but the input and output capacitors and voltage-setting resistor divider while keeping the ability to adjust key parameters to meet specific design requirements. The TPSM84209 operates at a 750-kHz fixed switching frequency and features advanced Eco-mode™ pulse-skip operation for improved light-load efficiency. The TPSM84209 provides an adjustable output-voltage range of 1.2 V to 6 V using a simple external-resistor divider. The TPSM84209 provides accurate voltage regulation for a variety of loads by using an internal voltage reference that is 2.5% accurate over temperature. The output-voltage rise time is controlled by a fixed 5-ms soft start. Input UVLO is internally set at 4.1 V, but can be adjusted upward using a resistor divider on the EN pin of the module. The EN pin can also be pulled low to put the module in standby mode to reduce input quiescent current. Thermal shutdown and current limit features protect the device during an overload condition. A 9-pin, 4-mm × 4.5-mm B3QFN package that includes exposed bottom pads provides a thermally enhanced solution for space-constrained applications.