JAJSEV9J May   2005  – September 2019 TS5A23166

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      概略回路図
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: 5-V Supply
    6. 6.6  Electrical Characteristics: 3.3-V Supply
    7. 6.7  Electrical Characteristics: 2.5-V Supply
    8. 6.8  Electrical Characteristics: 1.8-V Supply
    9. 6.9  Switching Characteristics: 5-V Supply
    10. 6.10 Switching Characteristics: 3.3-V Supply
    11. 6.11 Switching Characteristics: 2.5-V Supply
    12. 6.12 Switching Characteristics: 1.8-V Supply
    13. 6.13 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 デバイスの項目表記
    2. 12.2 ドキュメントの更新通知を受け取る方法
    3. 12.3 コミュニティ・リソース
    4. 12.4 商標
    5. 12.5 静電気放電に関する注意事項
    6. 12.6 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Electrical Characteristics: 5-V Supply

V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS TA V+ MIN TYP MAX UNIT
Analog Switch
VCOM,
VNO
Analog signal 0 V+ V
rpeak Peak ON resistance 0 ≤ VNO  ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C 4.5 V 0.9 1.1 Ω
Full 1.2
ron ON-state resistance VNO = 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C 4.5 V 0.75 0.9 Ω
Full 1
Δron ON-state resistance
match between
channels
VNO = 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C 4.5 V 0.04 0.1 Ω
Full 0.1
ron(flat) ON-state resistance
flatness
0 ≤ VNO  ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C 4.5 V 0.2 Ω
VNO = 1 V, 1.5 V, 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C 0.15 0.25
Full 0.25
INO(OFF) NO
OFF leakage current
VNO = 1 V,
VCOM = 4.5 V,
or
VNO = 4.5 V,
VCOM = 1 V,
Switch OFF,
see Figure 12
25°C 5.5 V 0 V 4 20(3) nA
Full –150 150
INO(PWROFF) VNO = 0 to 5.5 V,
VCOM = 5.5 V to 0,
Switch OFF,
see Figure 12
25°C 0 V –10 0.2 10(3) μA
Full –50 50
ICOM(OFF) COM
OFF leakage current
VCOM = 1 V,
VNO = 4.5 V,
or
VCOM = 4.5 V,
VNO = 1 V,
Switch OFF,
see Figure 12
25°C 5.5 V 0 V 4 20(3) nA
Full –150 150
ICOM(PWROFF) VCOM = 0 to 5.5 V,
VNO = 5.5 V to 0,
Switch OFF,
see Figure 12
25°C 0 V –10 0.2 10(3) μA
Full –50 50
INO(ON) NO
ON leakage current
VNO = 1 V,
VCOM = Open,
or
VNO = 4.5 V,
VCOM = Open,
Switch ON,
see Figure 13
25°C 5.5 V –5 0.4 5(3) nA
Full –50 50
ICOM(ON) COM
ON leakage current
VCOM = 1 V,
VNO = Open,
or
VCOM = 4.5 V,
VNO = Open,
Switch ON,
see Figure 13
25°C 5.5 V –5 0.4 5(3) nA
Full –50 50
Digital Control Inputs (IN1, IN2)(2)
VIH Input logic high Full 2.4 5.5 V
VIL Input logic low Full 0 0.8 V
IIH, IIL Input leakage current VI = 5.5 V or 0 25°C 5.5 V –2 0.3 2 nA
Full –20 20
Dynamic
QC Charge injection VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 19
25°C 5 V 6 pC
CNO(OFF) NO
OFF capacitance
VNO = V+ or GND,
Switch OFF,
See Figure 14 25°C 5 V 19 pF
CCOM(OFF) COM
OFF capacitance
VCOM = V+ or GND,
Switch OFF,
See Figure 14 25°C 5 V 18 pF
CNO(ON) NO
ON capacitance
VNO = V+ or GND,
Switch ON,
See Figure 14 25°C 5 V 35.5 pF
CCOM(ON) COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 14 25°C 5 V 35.5 pF
CI Digital input
capacitance
VI = V+ or GND, See Figure 14 25°C 5 V 2 pF
BW Bandwidth RL = 50 Ω,
Switch ON,
See Figure 16 25°C 5 V 150 MHz
OISO OFF isolation RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C 5 V –62 dB
XTALK Crosstalk RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C 5 V –85 dB
THD Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 20
25°C 5 V 0.005%
Supply
I+ Positive supply
current
VI = V+ or GND, Switch ON or OFF 25°C 5.5 V 0.01 0.1 μA
Full 1
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Not tested in production.