JAJSCO5C November 2016 – June 2018 TUSB422
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved | INT_VCONNDIS_DISABLE | INT_VBUSDIS_DISABLE | |||||
R | R/W | R/W |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7:2 | Reserved | R | 0 | Reserved |
1 | INT_VCONNDIS_DISABLE | R/W | 0 | When a VCONN discharge condition occurs, this register controls whether TUSB422 internal VCONN discharge circuit is used or not. When not used, it is assumed that VCONN discharge is handled external to TUSB422.
0b: Internal VCONN discharge enable 1b: Internal VCONN discharge disabled. |
0 | INT_VBUSDIS_DISABLE | R/W | 0 | When a VBUS discharge condition occurs, this register controls whether TUSB422 internal VBUS discharge circuit is used or not. When not used, it is assumed that VBUS discharge is handled external to TUSB422.
0b: Internal VBUS discharge enable 1b: Internal VBUS discharge disabled. |