JAJSOH3 October   2023 UCC27332-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Diagrams
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD Power On Reset
      2. 7.3.2 Input Stage
      3. 7.3.3 Enable Function
      4. 7.3.4 Output Stage
    4. 7.4 Device Functional Modes
  9. 8  Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Driving MOSFET
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Input-to-Output Configuration
          2. 8.2.1.2.2 Input Threshold Type
          3. 8.2.1.2.3 VDD Bias Supply Voltage
          4. 8.2.1.2.4 Peak Source and Sink Currents
          5. 8.2.1.2.5 Enable and Disable Function
          6. 8.2.1.2.6 Propagation Delay and Minimum Input Pulse Width
          7. 8.2.1.2.7 Power Dissipation
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Consideration
  10. 9 Device and Documentation Support
    1. 9.1 サード・パーティ製品に関する免責事項
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

GUID-20230927-SS0I-HBN0-WTB6-ZQZXQDMSX8S5-low.svg Figure 5-1 8-Pin MSOPDGN PackageTop View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
EN 3 I Enable or disable control pin. If not used, connect to VDD.
GND 4,5 G Device ground or reference
IN 2 I Non-inverting PWM input
OUT 6,7 O Output of the driver
VDD 1,8 P Driver bias supply. Connect the positive node of the voltage source to this pin through an impedance for high common mode noise rejection. Bypass this pin with two ceramic capacitors, generally >=1 µF and 0.1 µF, which are referenced to GND pin of this device.
Thermal Pad — Connect to GND through large copper plane.

This pad is not a low-impedance path to GND.
(1) I/O = Digital input/output, IA = Analog input, AO= Analog output, P = Power connection