JAJSS81I September   2008  – November 2023 UCC27423-Q1 , UCC27424-Q1 , UCC27425-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Dissipation Ratings
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stage
      2. 7.3.2 Output Stage
      3. 7.3.3 Enable
      4. 7.3.4 Parallel Outputs
      5. 7.3.5 Operational Waveforms and Circuit Layout
      6. 7.3.6 VDD
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Source and Sink Capabilities During Miller Plateau
        2. 8.2.2.2 Drive Current and Power Requirements
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 サード・パーティ製品に関する免責事項
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4 Device Functional Modes

With VDD power supply in the range of 4 V to 16 V, the output stage is dependent on the states of the HI and LI pins. Table 7-1 shows the UCC2742x-Q1 truth table.

Table 7-1 Input and Output Logic Table
ENBAENBBINPUTS (VIN_L, VIN_H)UCC27423-Q1UCC27424-Q1UCC27425-Q1
INAINBOUTAOUTBOUTAOUTBOUTAOUTB
HHLLHHLLHL
HHLHHLLHHH
HHHLLHHLLL
HHHHLLHHLH
LLXXLLLLLL

Importantly, if INA and INB are not used, they must be tied to either VDD or GND; they must not be left floating.