JAJSC34B March   2012  – December 2023 UCC28070A

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Pin Configuration and Functions
    1. 4.1 Pin Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Interleaving
      2. 6.3.2  Programming the PWM Frequency and Maximum Duty-Cycle Clamp
      3. 6.3.3  Frequency Dithering (Magnitude and Rate)
      4. 6.3.4  External Clock Synchronization
      5. 6.3.5  Multi-phase Operation
      6. 6.3.6  VSENSE and VINAC Resistor Configuration
      7. 6.3.7  VSENSE and VINAC Open-Circuit Protection
      8. 6.3.8  Current Synthesizer
      9. 6.3.9  Programmable Peak Current Limit
      10. 6.3.10 Linear Multiplier and Quantized Voltage Feed Forward
      11. 6.3.11 Enhanced Transient Response (VA Slew-Rate Correction)
      12. 6.3.12 Voltage Biasing (VCC and VVREF)
      13. 6.3.13 PFC Enable and Disable
      14. 6.3.14 Adaptive Soft Start
      15. 6.3.15 PFC Start-Up Hold Off
      16. 6.3.16 Output Overvoltage Protection (OVP)
      17. 6.3.17 Zero-Power Detection
      18. 6.3.18 Thermal Shutdown
      19. 6.3.19 Current Loop Compensation
      20. 6.3.20 Voltage Loop Compensation
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Output Current Calculation
        2. 7.2.2.2 Bridge Rectifier
        3. 7.2.2.3 PFC Inductor (L1 and L2)
        4. 7.2.2.4 PFC MOSFETs (M1 and M2)
        5. 7.2.2.5 PFC Diode
        6. 7.2.2.6 PFC Output Capacitor
        7. 7.2.2.7 Current-Loop Feedback Configuration (Sizing of the Current-Transformer Turns-Ratio and Sense Resistor (RS))
        8. 7.2.2.8 Current-Sense Offset and PWM Ramp for Improved Noise Immunity
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Community Resources
    3. 8.3 Trademarks
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

GUID-68E07C1D-01D5-4AC1-8BFD-4C2CF4221B41-low.gifFigure 5-1 VCC Supply Current vs Junction Temperature
GUID-BE97B955-9B35-4CD7-845D-27DB80B42092-low.gifFigure 5-3 VVSENSE Regulation vs Junction Temperature
GUID-9DD9BB21-C411-4593-9025-B6946A9F9C09-low.gifFigure 5-5 IMO, Multiplier Output Current vs VVAO
GUID-002E57A7-9B5A-4280-A040-950DE805312C-low.gifFigure 5-7 IVINAC Bias Current vs Junction Temperature
GUID-5B697BF2-3F2C-40DA-A6CC-E97E6FB627BC-low.gifFigure 5-9 VAO, Voltage Amplifier Transconductance vs Junction Temperature
GUID-74828964-BC6E-40F0-9E78-369A70CC38CC-low.gifFigure 5-11 Current Amplifier Transconductance vs Junction Temperature
GUID-AA2175FC-363C-4DB9-A056-8487D05D7C47-low.gif
IVREF = 0mA
Figure 5-2 VVREF vs Junction Temperature
GUID-8B557F57-CED2-4EB8-853F-D840D974B960-low.gifFigure 5-4 IVSENSE Bias Current vs Junction Temperature
GUID-BF245671-6AF8-42B1-BFA8-61792A6F5CBA-low.gifFigure 5-6 Multiplier Constant vs Junction Temperature
GUID-319E954E-40C7-4255-86B9-8CA759C31FDC-low.gifFigure 5-8 Switching Frequency vs Temperature
GUID-EC6FAB60-0C58-4259-B48F-34836A8D4879-low.gifFigure 5-10 Voltage Amplifier Transfer Function vs VVSENSE
GUID-0D57B084-047A-4CEA-AF40-FB6F6385B59F-low.gif
0.8V Common Mode
Figure 5-12 CAx Input Offset Voltage vs Junction Temperature
GUID-3679473D-974A-4271-A8AA-8A14A4F97520-low.gif
2V Common Mode
Figure 5-14 CAx Input Offset Voltage vs Junction Temperature
GUID-45043738-F386-4712-8800-A74672D5F17C-low.gif
3.6V Common Mode
Figure 5-16 CAx Input Offset Voltage vs Junction Temperature
GUID-9A02C67C-FFB2-4D9A-8A34-43D255733323-low.gif
0.8V Common Mode
Figure 5-13 CA1 to CA2 Relative Offset vs Junction Temperature
GUID-ECA3F696-D0E4-4424-843A-E795DA7270AB-low.gif
2V Common Mode
Figure 5-15 CA1 to CA2 Relative Offset vs Junction Temperature
GUID-FAB14A77-A73E-4264-A669-D7DEA8346E65-low.gif
3.6V Common Mode
Figure 5-17 CA1 to CA2 Relative Offset vs Junction Temperature