JAJSCD2E august   2016  – march 2023 TUSB546-DCI

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Supply Characteristics
    6. 6.6  DC Electrical Characteristics
    7. 6.7  AC Electrical Characteristics
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
      1.      Parameter Measurement Information
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 USB 3.1
      2. 7.3.2 DisplayPort
      3. 7.3.3 4-Level Inputs
      4. 7.3.4 Receiver Linear Equalization
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Configuration in GPIO Mode
      2. 7.4.2 28
      3. 7.4.3 Device Configuration In I2C Mode
      4. 7.4.4 DisplayPort Mode
      5. 7.4.5 Linear EQ Configuration
      6. 7.4.6 USB3.1 Modes
      7. 7.4.7 Operation Timing – Power Up
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 General Register (address = 0x0A) [reset = 00000001]
      2. 7.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
      3. 7.6.3 DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
      4. 7.6.4 DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
      5. 7.6.5 DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
      6. 7.6.6 USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
      7. 7.6.7 USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
      8. 7.6.8 USB3.1 Control/Status Registers (address = 0x22) [reset = 00000100]
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 USB 3.1 Only
      2. 8.3.2 USB 3.1 and 2 Lanes of DisplayPort
      3. 8.3.3 DisplayPort Only
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  10. 10Mechanical, Packaging, and Orderable Information

DC Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
4-State CMOS Inputs(EQ[1:0], SSEQ[1:0], DPEQ[1:0], I2C_EN)
IIHHigh level input currentVCC = 3.6 V; VIN = 3.6 V2080µA
IILLow level input currentVCC = 3.6 V; VIN = 0 V–160-40µA
4-Level VTHThreshold 0 / RVCC = 3.3 V0.55V
Threshold R/ FloatVCC = 3.3 V1.65V
Threshold Float / 1VCC = 3.3 V2.7V
RPUInternal pull-up resistance35
RPDInternal pull-down resistance95
2-State CMOS Input (CTL0, CTL1, FLIP, CAD_SNK, HPDIN) CTL1, CTL0 and FLIP are Failsafe.
VIHHigh-level input voltage23.6V
VILLow-level input voltage00.8V
RPDInternal pull-down resistance for CTL1500kΩ
R(ENPD)Internal pull-down resistance for CAD_SNK (pin 29), and HPDIN (pin 32)150kΩ
IIHHigh-level input currentVIN = 3.6 V–2525µA
IILLow-level input currentVIN = GND, VCC = 3.6 V–2525µA
I2C Control Pins SCL, SDA
VIHHigh-level input voltageI2C_EN = 00.7 x V(I2C)3.6V
VILLow-level input voltageI2C_EN = 000.3 x V(I2C)V
VOLLow-level output voltageI2C_EN = 0; IOL = 3 mA00.4V
IOLLow-level output currentI2C_EN = 0; VOL = 0.4 V20mA
II(I2C)Input current on SDA pin0.1 x V(I2C) < Input voltage < 3.3 V–1010µA
CI(I2C)Input capacitance10pF
C(I2C_FM+_BUS)I2C bus capacitance for FM+ (1MHz)150pF
C(I2C_FM_BUS)I2C bus capacitance for FM (400kHz)150pF
R(EXT_I2C_FM+)External resistors on both SDA and SCL when operating at FM+ (1MHz)C(I2C_FM+_BUS) = 150 pF620820910
R(EXT_I2C_FM)External resistors on both SDA and SCL when operating at FM (400kHz)C(I2C_FM_BUS) = 150 pF62015002200