JAJSCO4D November   2016  – December 2023 TPS22976

PRODUCTION DATA  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (VBIAS = 5V)
    6. 6.6  Electrical Characteristics (VBIAS = 2.5V)
    7. 6.7  Switching Characteristics (TPS22976)
    8. 6.8  Switching Characteristics (TPS22976A)
    9. 6.9  Switching Characteristics (TPS22976N)
    10. 6.10 Typical DC Characteristics
    11. 6.11 Typical AC Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON and OFF Control
      2. 8.3.2 Input Capacitor (Optional)
      3. 8.3.3 Output Capacitor (Optional)
      4. 8.3.4 Quick Output Discharge (QOD) (Not Present in TPS22976N)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
  10. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Parallel Configuration
      2. 9.1.2 Standby Power Reduction
      3. 9.1.3 Power Supply Sequencing without GPIO Input
      4. 9.1.4 Reverse Current Blocking
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inrush Current
        2. 9.2.2.2 Adjustable Rise Time
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
      3. 9.4.3 Power Dissipation
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Developmental Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Adjustable Rise Time

A capacitor to GND on the CT pins sets the slew rate for each channel. To ensure desired performance, a capacitor with a minimum voltage rating of 25 V must be used on either CT pins. An approximate formula for the relationship between CT and slew rate is shown in Equation 4, and this is valid for TPS22976 and TPS22976N. The TPS22976A has a faster rise time and is represented by Equation 5.

Equation 4 and Equation 5 account for 10% to 90% measurement on VOUT and do not apply for CT < 100 pF. Use Table 9-2 to determine rise times for when CT = 0 pF.

TPS22976, TPS22976N:
Equation 4. SR = 0.42 × CT + 66
TPS22976A:
Equation 5. SR = 0.0606 × CT + 22

where

  • SR is the slew rate (in µs/V)
  • CT is the capacitance value on the CT pin (in pF)
  • The units for the constants 66 and 22 are in µs/V.

Rise time can be calculated by multiplying the input voltage by the slew rate. Table 10-2 shows rise time values measured on a typical device. Rise times shown below are only valid for the power-up sequence where VIN and VBIAS are already in steady state condition, and the ON pin is asserted high.

Table 9-2 Rise Time Values (TPS22976, TPS22976N)
CT (pF) RISE TIME (µs) 10% - 90%, CL = 0.1 µF, CIN = 1 µF, RL = 10 Ω(1)
5 V 3.3 V 1.8 V 1.5 V 1.2 V 1.05 V 0.6 V
0 149 112 77 70 60 56 42
220 548 388 236 206 173 154 103
470 968 673 401 342 289 256 169
1000 1768 1220 711 608 505 445 286
2200 3916 2678 1554 1332 1097 949 627
4700 8040 5477 3179 2691 2240 1964 1249
10000 16520 11150 6410 5401 4430 3933 2526
TYPICAL VALUES at 25°C, VBIAS = 5 V, 25 V X7R 10% CERAMIC CAP