JAJSCT8D March   2015  – March 2017 LMG5200

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Propagation Delay and Mismatch Measurement
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Control Inputs
      2. 8.3.2 Start-up and UVLO
      3. 8.3.3 Bootstrap Supply Voltage Clamping
      4. 8.3.4 Level Shift
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 VCC Bypass Capacitor
        2. 9.2.2.2 Bootstrap Capacitor
        3. 9.2.2.3 Power Dissipation
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報
    1. 13.1 パッケージ情報

Parameter Measurement Information

Propagation Delay and Mismatch Measurement

Figure 5 shows the typical test setup used to measure the propagation mismatch. As the gate drives are not accessible, pullup and pulldown resistors in this test circuit are used to indicate when the low-side GaN FET turns ON and the high-side GaN FET turns OFF and vice versa to measure the tMON and tMOFF parameters. Resistance values used in this circuit for the pullup and pulldown resistors are in the order of 1 kΩ; the current sources used are 2 A.

Figure 6 through Figure 9 show propagation delay measurement waveforms. For turnon propagation delay measurements, the current sources are not used. For turnoff time measurements, the current sources are set to 2 A, and a voltage clamp limit is also set, referred to as VIN(CLAMP). When measuring the high-side component turnoff delay, the current source across the high-side FET is turned on, the current source across the low-side FET is off, HI transitions from high-to-low, and output voltage transitions from VIN to VIN(CLAMP). Similarly, for low-side component turnoff propagation delay measurements, the high-side component current source is turned off, and the low-side component current source is turned on, LI transitions from high to low and the output transitions from GND potential to VIN(CLAMP). The time between the transition of LI and the output change is the propagation delay time.

LMG5200 typ_app_3_snoscy4.gif Figure 5. Propagation Delay and Propagation Mismatch Measurement
LMG5200 turn_on_hi_delay_snoscy4.gif Figure 6. High-Side Gate Driver Turnon
LMG5200 turn_off_hi_delay_snoscy4.gif
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Figure 8. High-Side Gate Driver Turnoff
LMG5200 turn_on_li_delay_snoscy4.gif Figure 7. Low-Side Gate Driver Turnon
LMG5200 turn_off_li_delay_snoscy4.gif Figure 9. Low-Side Gate Driver Turnoff