JAJSCV3A December   2016  – April 2017 LMR23610-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
  4. 改訂履歴
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Fixed Frequency Peak Current Mode Control
      2. 7.3.2 Adjustable Output Voltage
      3. 7.3.3 Enable/Sync
      4. 7.3.4 VCC, UVLO
      5. 7.3.5 Minimum ON-time, Minimum OFF-time and Frequency Foldback at Drop-out Conditions
      6. 7.3.6 Internal Compensation and CFF
      7. 7.3.7 Bootstrap Voltage (BOOT)
      8. 7.3.8 Over Current and Short Circuit Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 CCM Mode
      4. 7.4.4 Light Load Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Output Voltage Set-Point
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Inductor Selection
        5. 8.2.2.5  Output Capacitor Selection
        6. 8.2.2.6  Feed-Forward Capacitor
        7. 8.2.2.7  Input Capacitor Selection
        8. 8.2.2.8  Bootstrap Capacitor Selection
        9. 8.2.2.9  VCC Capacitor Selection
        10. 8.2.2.10 Under Voltage Lockout Set-Point
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Compact Layout for EMI Reduction
    3. 10.3 Ground Plane and Thermal Considerations
    4. 10.4 Feedback Resistors
    5. 10.5 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The LMR23610-Q1 is a step down DC-to-DC regulator. It is typically used to convert a higher DC voltage to a lower DC voltage with a maximum output current of 1 A. The following design procedure can be used to select components for the LMR23610-Q1. Alternately, the WEBENCH® software may be used to generate complete designs. When generating a design, the WEBENCH® software utilizes iterative design procedure and accesses comprehensive databases of components. Please go to ti.com for more details.

Typical Applications

The LMR23610-Q1 only requires a few external components to convert from a wide voltage range supply to a fixed output voltage. Figure 21 shows a basic schematic.

LMR23610-Q1 lmr23610-q1-schematic-snvsar4.gif Figure 21. Application Circuit

The external components have to fulfill the needs of the application, but also the stability criteria of the device's control loop. Table 1 can be used to simplify the output filter component selection.

Table 1. L, COUT and CFF Typical Values

fSW (kHz) VOUT (V) L (µH) COUT (µF) CFF (pF) RFBT (kΩ)
400 3.3 15 82 100 51
400 5 22 68 75 88.7
400 12 47 33 See note (5) 243
400 24 47 22 See note (5) 510
  1. Inductance value is calculated based on VIN = 36 V.
  2. All the COUT values are after derating. Add more when using ceramic capacitors.
  3. RFBT = 0 Ω for VOUT = 1 V. RFBB = 22.1 kΩ for all other VOUT setting.
  4. For designs with RFBT other than recommended value, please adjust CFF such that (CFF × RFBT) is unchanged and adjust RFBB such that (RFBT / RFBB) is unchanged.
  5. High ESR COUT will give enough phase boost and CFF not needed.

Design Requirements

Detailed design procedure is described based on a design example. For this design example, use the parameters listed in Table 2 as the input parameters.

Table 2. Design Example Parameters

Input Voltage, VIN 12 V typical, range from 8 V to 28 V
Output Voltage, VOUT 5 V
Maximum Output Current IO_MAX 1 A
Transient Response 0.1 A to 1 A 5%
Output Voltage Ripple 50 mV
Input Voltage Ripple 400 mV
Switching Frequency fSW 400 kHz

Detailed Design Procedure

Custom Design With WEBENCH® Tools

Click here to create a custom design using the LMR23610-Q1 device with the WEBENCH® Power Designer.

  1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
  2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
  3. Compare the generated design with other possible solutions from Texas Instruments.

The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability.

In most cases, these actions are available:

  • Run electrical simulations to see important waveforms and circuit performance
  • Run thermal simulations to understand board thermal performance
  • Export customized schematic and layout into popular CAD formats
  • Print PDF reports for the design, and share the design with colleagues

Get more information about WEBENCH tools at www.ti.com/WEBENCH.

Output Voltage Set-Point

The output voltage of LMR23610-Q1 is externally adjustable using a resistor divider network. The divider network is comprised of top feedback resistor RFBT and bottom feedback resistor RFBB. Equation 10 is used to determine the output voltage:

Equation 10. LMR23610-Q1 equation_08_snvsah2.gif

Choose the value of RFBB to be 22.1 kΩ. With the desired output voltage set to 5 V and the VREF = 1.0 V, the RFBB value can then be calculated using Equation 10. The formula yields to a value 88.7 kΩ.

Switching Frequency

The default switching frequency of the LMR23610-Q1 is 400 kHz. For other switching frequency, the device must be synchronized to an external clock, please refer to Enable/Sync for more details.

Inductor Selection

The most critical parameters for the inductor are the inductance, saturation current and the rated current. The inductance is based on the desired peak-to-peak ripple current ΔiL. Since the ripple current increases with the input voltage, the maximum input voltage is always used to calculate the minimum inductance LMIN. Use Equation 12 to calculate the minimum value of the output inductor. KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum output current of the device. A reasonable value of KIND should be 30% to 50%. During an instantaneous short or over current operation event, the RMS and peak inductor current can be high. The inductor current rating should be higher than the current limit of the device.

Equation 11. LMR23610-Q1 equation_09_snvsah2.gif
Equation 12. LMR23610-Q1 equation_10_snvsah2.gif

In general, it is preferable to choose lower inductance in switching power supplies, because it usually corresponds to faster transient response, smaller DCR, and reduced size for more compact designs. But too low of an inductance can generate too large of an inductor current ripple such that over current protection at the full load could be falsely triggered. It also generates more conduction loss and inductor core loss. Larger inductor current ripple also implies larger output voltage ripple with same output capacitors. With peak current mode control, it is not recommended to have too small of an inductor current ripple. A larger peak current ripple improves the comparator signal to noise ratio.

For this design example, choose KIND = 0.5, the minimum inductor value is calculated to be 20.5 µH. Choose the nearest standard 22 μH ferrite inductor with a capability of 2 A RMS current and 2.5 A saturation current.

Output Capacitor Selection

The output capacitor(s), COUT, should be chosen with care since it directly affects the steady state output voltage ripple, loop stability and the voltage over/undershoot during load current transients.

The output ripple is essentially composed of two parts. One is caused by the inductor current ripple going through the Equivalent Series Resistance (ESR) of the output capacitors:

Equation 13. LMR23610-Q1 eq11_snvsa81.gif

The other is caused by the inductor current ripple charging and discharging the output capacitors:

Equation 14. LMR23610-Q1 equation_11_snvsah2.gif

The two components in the voltage ripple are not in phase, so the actual peak-to-peak ripple is smaller than the sum of two peaks.

Output capacitance is usually limited by transient performance specifications if the system requires tight voltage regulation with presence of large current steps and fast slew rate. When a fast large load increase happens, output capacitors provide the required charge before the inductor current can slew up to the appropriate level. The regulator’s control loop usually needs six or more clock cycles to respond to the output voltage droop. The output capacitance must be large enough to supply the current difference for six clock cycles to maintain the output voltage within the specified range. Equation 15 shows the minimum output capacitance needed for specified output undershoot. When a sudden large load decrease happens, the output capacitors absorb energy stored in the inductor. which results in an output voltage overshoot. Equation 16 calculates the minimum capacitance required to keep the voltage overshoot within a specified range.

Equation 15. LMR23610-Q1 equation_01_snvsah4.gif
Equation 16. LMR23610-Q1 equation_13_snvsah2.gif

where

  • KIND = Ripple ratio of the inductor ripple current (ΔiL / IOUT)
  • IOL = Low level output current during load transient
  • IOH = High level output current during load transient
  • VUS = Target output voltage undershoot
  • VOS = Target output voltage overshoot

For this design example, the target output ripple is 50 mV. Presuppose ΔVOUT_ESR = ΔVOUT_C = 50 mV, and chose KIND = 0.5. Equation 13 yields ESR no larger than 100 mΩ and Equation 14 yields COUT no smaller than 3.1 μF. For the target over/undershoot range of this design, VUS = VOS = 5% × VOUT = 250 mV. The COUT can be calculated to be no smaller than 54 μF and 8.5 μF by Equation 15 and Equation 16 respectively. Consider of derating, one 82 μF, 16 V ceramic capacitor with 5 mΩ ESR is used.

Feed-Forward Capacitor

The LMR23610-Q1 is internally compensated. Depending on the VOUT and frequency fSW, if the output capacitor COUT is dominated by low ESR (ceramic types) capacitors, it could result in low phase margin. To improve the phase boost an external feedforward capacitor CFF can be added in parallel with RFBT. CFF is chosen such that phase margin is boosted at the crossover frequency without CFF. A simple estimation for the crossover frequency (fX) without CFF is shown in Equation 17, assuming COUT has very small ESR, and COUT value is after derating.

Equation 17. LMR23610-Q1 equation_14_snvsah2.gif

The following equation for CFF was tested:

Equation 18. LMR23610-Q1 equation_02_snvsah4.gif

For designs with higher ESR, CFF is not needed when COUT has very high ESR and CFF calculated from Equation 18 should be reduced with medium ESR. Table 1 can be used as a quick starting point.

For the application in this design example, a 75 pF, 50 V, COG capacitor is selected.

Input Capacitor Selection

The LMR23610-Q1 device requires high frequency input decoupling capacitor(s) and a bulk input capacitor, depending on the application. The typical recommended value for the high frequency decoupling capacitor is 4.7 μF to 10 μF. A high-quality ceramic capacitor type X5R or X7R with sufficiency voltage rating is recommended. To compensate the derating of ceramic capacitors, a voltage rating of twice the maximum input voltage is recommended. Additionally, some bulk capacitance can be required, especially if the LMR23610-Q1 circuit is not located within approximately 5 cm from the input voltage source. This capacitor is used to provide damping to the voltage spike due to the lead inductance of the cable or the trace. For this design, two 4.7 μF, 50 V, X7R ceramic capacitors are used. A 0.1 μF for high-frequency filtering and place it as close as possible to the device pins.

Bootstrap Capacitor Selection

Every LMR23610-Q1 design requires a bootstrap capacitor (CBOOT). The recommended capacitor is 0.1 μF and rated 16 V or higher. The bootstrap capacitor is located between the SW pin and the BOOT pin. The bootstrap capacitor must be a high-quality ceramic type with an X7R or X5R grade dielectric for temperature stability.

VCC Capacitor Selection

The VCC pin is the output of an internal LDO for LMR23610-Q1. To insure stability of the device, place a minimum of 2.2 μF, 16 V, X7R capacitor from this pin to ground.

Under Voltage Lockout Set-Point

The system undervoltage lockout (UVLO) is adjusted using the external voltage divider network of RENT and RENB.  The UVLO has two thresholds, one for power up when the input voltage is rising and one for power down or brown outs when the input voltage is falling. The following equation can be used to determine the VIN UVLO level.

Equation 19. LMR23610-Q1 equation_16_snvsah2.gif

The EN rising threshold (VENH) for LMR23610-Q1 is set to be 1.55 V (typ). Choose the value of RENB to be 287 kΩ to minimize input current from the supply. If the desired VIN UVLO level is at 6.0 V, then the value of RENT can be calculated using the equation below:

Equation 20. LMR23610-Q1 equation_17_snvsah2.gif

The above equation yields a value of 820 kΩ. The resulting falling UVLO threshold, equals 4.4 V, can be calculated by below equation, where EN hysteresis (VEN_HYS) is 0.4 V (typ).

Equation 21. LMR23610-Q1 equation_18_snvsah2.gif

Application Curves

Unless otherwise specified the following conditions apply: VIN = 12 V, fSW = 400 kHz, L = 22 µH, COUT = 47 µF × 2, TA = 25 °C.
LMR23610-Q1 waveform_03_snvsah4.png
VOUT = 5 V IOUT = 1 A fSW = 400 kHz
Figure 22. CCM Mode
LMR23610-Q1 waveform_05_snvsah4.png
VIN = 12 V VOUT = 5 V IOUT = 1 A
Figure 24. Start Up by VIN
LMR23610-Q1 waveform_07_snvsah4.png
VIN = 12 V VOUT = 5 V IOUT = 0.1 A to 1 A, 100 mA / μs
Figure 26. Load Transient
LMR23610-Q1 waveform_09_snvsah4.png
VOUT = 5 V IOUT = 1 A to short
Figure 28. Short Protection
LMR23610-Q1 waveform_04_snvsah4.png
VOUT = 5 V IOUT = 0 mA fSW = 400 kHz
Figure 23. PFM Mode
LMR23610-Q1 waveform_06_snvsah4.png
VIN = 12 V VOUT = 5 V IOUT = 1 A
Figure 25. Start Up by EN
LMR23610-Q1 waveform_08_snvsah4.png
VOUT = 7 V to 36 V, 2 V / μs VOUT = 5 V IOUT = 1 A
Figure 27. Line Transient
LMR23610-Q1 waveform_10_snvsah4.png
VOUT = 5 V IOUT = short to 1 A
Figure 29. Short Recovery