SBAU412A November   2022  – May 2024 AFE7900 , AFE7903 , AFE7906 , AFE7920 , AFE7921 , AFE7950

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Prerequisites
  6. 3 Typical Bare-Metal Design Flow
  7. 4 Background
  8. 5 Add Microblaze and SPI IP for Use in Vitis for Embedded Development
  9. 6 Create New Platforms in Vitis
  10. 7 Create New Application Projects in Vitis
  11. 8 Build Application Projects
  12. 9 Generate SPI Log for AFE79xx EVM
    1. 9.1 Generating the LMK SPI Log
    2. 9.2 Generating the AFE SPI Log
    3. 9.3 Converting SPI Logs to Format for Vitis
  13. 10AFE79xxEVM Board Modifications
  14. 11Configure the AXI GPIO
    1. 11.1 Initializing the GPIO
    2. 11.2 Setting the Direction
    3. 11.3 Setting High or Low for Corresponding Bits
  15. 12Configure the AXI SPI
  16. 13Set Up and Power on Hardware
  17. 14Set up ZCU102 Board Interface for VADJ_FMC
  18. 15Debug Application Projects and Set up Vitis Serial Terminal
  19. 16Execute the Application
  20. 17Revision History

9.3 Converting SPI Logs to Format for Vitis

In the AFE79xx Secure folder you can find a script called ‘SPI_Convert.py’, which is used to convert the generated SPI logs into the correct format. This script should be opened in the AFE79xx GUI and after running the script two files called ‘AFEspiwrites.c’ and ‘LMKspiwrites.c’ will be generated.

All the commands in these spiwrites files can be copied and pasted into the tiafe_bringup.h file in the Vitis project.

  1. The contents of the ‘AFEspiwrites.c’ file must be copied into the bringupafe() function. In the figure below the function that contains the commands is shown.
    AFE7920
  2. The contents of the ‘LMKspiwrites.c’ file must be copied into the lmk_config() function. In the figure below the function that contains the commands is shown.
    AFE7920

After updating the tiafe_bringup.h file in Vitis the application project should be built again, following the steps outlined in Section 8 Build Application Projects.