SFFS372 February 2022 TPS74801-Q1
4.1 VQFN Package
Figure 4-1 shows the TPS74801-Q1 pin diagram for the VQFN package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS74801-Q1 data sheet.
Figure 4-1 Pin Diagram (VQFN) PackageTable 4-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| OUT | 1 | Device hits current limit state. If the power dissipation is significant, the device hits thermal shutdown state, and could continue to cycle between the two states. Continuously running the device above rated current degrades device reliability. | A |
| NC | 2 | No impact. Normal operation with improved thermal performance. | D |
| NC | 3 | No impact. Normal operation with improved thermal performance. | D |
| NC | 4 | No impact. Normal operation with improved thermal performance. | D |
| IN | 5 | Device does not turn on. No damage to device. | B |
| IN | 6 | Device does not turn on. No damage to device. | B |
| IN | 7 | Device does not turn on. No damage to device. | B |
| IN | 8 | Device does not turn on. No damage to device. | B |
| PG | 9 | No damage to device. PG functionality does not work. No impact on remaining functionality. | B |
| BIAS | 10 | No damage to device. Because band gap and control circuits do not power up, output voltage is not regulated and remains low at 0 V. | B |
| EN | 11 | Device does not turn on. No damage to device. | B |
| GND | 12 | No impact. Normal operation. | D |
| NC | 13 | No impact. Normal operation with improved thermal performance. | D |
| NC | 14 | No impact. Normal operation with improved thermal performance. | D |
| SS | 15 | Quiescent current increases. Device output remains at 0 V. No damage to device. | B |
| FB | 16 | Loss of functionality, device does not regulate. Output voltage tracks input voltage and equals VIN minus the dropout. No damage to device. | B |
| NC | 17 | No impact. Normal operation with improved thermal performance. | D |
| OUT | 18 | Same as pin 1. | B/A |
| OUT | 19 | Same as pin 1. | B/A |
| OUT | 20 | Same as pin 1. | B/A |
Table 4-3 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| OUT | 1 | No impact. Normal operation. Load still connected to remaining OUT pins (18, 19, and 20). There is a small risk that the bond wires connecting to the remaining OUT pins may fuse under heavily loaded conditions. | D/A |
| NC | 2 | No impact. Normal operation. | D |
| NC | 3 | No impact. Normal operation. | D |
| NC | 4 | No impact. Normal operation. | D |
| IN | 5 | Normal operation. Power supply still connected to remaining IN pins (6, 7, and 8), however there is a small risk that the bond wires connecting to the remaining IN pins may fuse under heavily loaded conditions. | D/A |
| IN | 6 | Same as pin 5. | D/A |
| IN | 7 | Same as pin 5. | D/A |
| IN | 8 | Same as pin 5. | D/A |
| PG | 9 | No damage to device. PG functionality does not work. No impact on remaining functionality. | B |
| BIAS | 10 | No damage to device. Because band gap and control circuits do not power up, output voltage is not regulated and remains low at 0 V. | B |
| EN | 11 | Because the voltage floats to an indeterminate state, the device can disable. | B |
| GND | 12 | With the reference pin floating, the voltages at the remaining pins are floating as well and the device is not functional. There is a risk of violating absolute maximum ratings. | B/A |
| NC | 13 | No impact. Normal operation. | D |
| NC | 14 | No impact. Normal operation. | D |
| SS | 15 | No impact. Normal operation. Start-up time defaults to 200 μs, approximately. | D |
| FB | 16 | Loss of functionality. Output pin voltage is not regulated and remains in an indeterminate state. | B |
| NC | 17 | No impact. Normal operation. | D |
| OUT | 18 | Same as pin 1. | D/A |
| OUT | 19 | Same as pin 1. | D/A |
| OUT | 20 | Same as pin 1. | D/A |
Table 4-4 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| OUT | 1 | NC | No impact. Normal operation. | D |
| NC | 2 | NC | No impact. Normal operation. | D |
| NC | 3 | NC | No impact. Normal operation. | D |
| NC | 4 | IN | No impact. Normal operation. | D |
| IN | 5 | IN | No impact. Normal operation. | D |
| IN | 6 | IN | No impact. Normal operation. | D |
| IN | 7 | IN | No impact. Normal operation. | D |
| IN | 8 | PG | Very high risk of damage to PG pin and device, resulting from excess current drawn when PG open drain becomes low impedance. | A |
| PG | 9 | BIAS | Very high risk of damage to PG pin and device, resulting excess current drawn when PG open drain becomes low impedance. | A |
| BIAS | 10 | EN | Device remains ON regardless of enable signal value. | B |
| EN | 11 | GND | Device remains OFF regardless of enable signal value. | B |
| GND | 12 | NC | No impact. Normal operation. | D |
| NC | 13 | NC | No impact. Normal operation. | D |
| NC | 14 | SS | No impact. Normal operation. | D |
| SS | 15 | FB | The error amplifier output rails to either one of its supplies, and the LDO output is either at 0 V or tracks VIN and equals VIN – dropout. | B |
| FB | 16 | NC | No impact. Normal operation. | D |
| NC | 17 | OUT | No impact. Normal operation. | D |
| OUT | 18 | OUT | No impact. Normal operation. | D |
| OUT | 19 | OUT | No impact. Normal operation. | D |
| OUT | 20 | OUT | No impact. Normal operation. | D |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to
Supply
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| OUT | 1 | Device is not functional, output voltage is not regulated and equals VIN. | B |
| NC | 2 | No impact. Normal operation. | D |
| NC | 3 | No impact. Normal operation. | D |
| NC | 4 | No impact. Normal operation. | D |
| IN | 5 | No impact. Normal operation. | D |
| IN | 6 | No impact. Normal operation. | D |
| IN | 7 | No impact. Normal operation. | D |
| IN | 8 | No impact. Normal operation. | D |
| PG | 9 | Very high risk of damage to PG pin and device, resulting from excess current drawn when PG open drain becomes low impedance. | A |
| BIAS | 10 | Can be certain of normal operation only if sufficient dropout (VIN ≥ VOUT + VDO, where VDO = IOUT × (1.6 / 1.5)) and VIN (VIN ≥ 2.7 V) are provided. Device does not turn on for lower values of VIN, and VOUT remains at 0 V. | B/D |
| EN | 11 | Device remains ON regardless of enable signal value. | B |
| GND | 12 | Device does not turn on. | B |
| NC | 13 | No impact. Normal operation. | D |
| NC | 14 | No impact. Normal operation. | D |
| SS | 15 | LDO output pin voltage is not regulated and tracks VIN. VOUT equals VIN – dropout. | B |
| FB | 16 | LDO output pin voltage is not regulated and equals VIN (under no-load conditions). | B |
| NC | 17 | No impact. Normal operation. | D |
| OUT | 18 | Same as pin 1. | A |
| OUT | 19 | Same as pin 1. | A |
| OUT | 20 | Same as pin 1. | A |