For implementing multiple frequencies on a single timer module, all that is needed in the timer ISRs is to determine which TxCCRx count triggered the interrupt and to add the timer counts for one half of the corresponding period to the current TxCCRx value. One half of the period is added because the output is toggling each time the count reaches the TxCCRx value, so it takes two interrupts before one full period has passed. The following code shows the timer ISRs from the file multi_freq_g2452_example.c:

// Timer_A0 interrupt service routine
#pragma vector=TIMER0_A0_VECTOR
__interrupt void Timer_A0 (void)
{
  TACCR0 += 100;                           // reload period
}
// Timer_A1 Interrupt Vector (TA0IV) handler
#pragma vector=TIMER0_A1_VECTOR
__interrupt void Timer_A1(void)
{
  switch( TA0IV )
  {
  case  2:  TACCR1 += 200;                 // reload period
           break;
  case  4:  TACCR2 += 500;                 // reload period
           break;
  case 10: P1OUT ^= 0x01;                  // Timer overflow
           break;
  default: break;
  }
}

This example shows the ISRs for generating 5-kHz, 2.5-kHz, and 1-kHz signals from a 1-MHz timer clock source (see Equation 4).

Equation 4.