SLAA856A July   2018  – July 2021 TAS5825M

 

  1.   Trademarks
  2. 1General Overview
  3. 2Advanced Emission Suppression
    1. 2.1 Spread Spectrum Modulation
    2. 2.2 Dephase and Multi-Device Phase Synchronization
  4. 3Printed Circuit Board Design for EMC
    1. 3.1 Printed Circuit Board Layout
    2. 3.2 Ferrite Bead Filter
    3. 3.3 Power Supply and Speaker Wires
    4. 3.4 TAS5825M Device Configurations
  5. 4TAS5825M EMI Test Results
    1. 4.1 EN55022 Radiated Emission Results
    2. 4.2 EN55022 Conducted Emission Results
    3. 4.3 Conclusions
  6. 5Revision History

Printed Circuit Board Layout

It is necessary to follow recommended PCB guidelines for EMC success. Proper PCB floor planning, component selection, component placement, and routing are all essential to counter EMI. Emissions are exacerbated by improper layout, components, and output trace length causing antenna effect. Practical PCB design guidelines for achieving EMC include:

  • Place the high-frequency decoupling capacitors as close to the power pin and ground pin of the device as possible to reduce the parasitic inductance of the trace. To ensure low AC impedance over a wide frequency range for noise reduction, use good quality, low-ESR, 1-nF ceramic capacitors. For mid-frequency noise due to PWM transients, use another good quality 0.1 µF ceramic capacitor placed as close as possible to the PVDD leads.
  • Use a continuous ground plane and avoid voltage offset on the ground planes whenever possible.
  • Low impedance routing back to source (return signal).
  • Power planes should be away from the edges of the PCB.
  • Proper filtering of the PCB connectors.
  • Place EMC snubbers and ferrite bead filters as close as possible to the IC. Minimize unfiltered loops and trace length as well as stray inductance.
  • Keep amplifier output traces to the speaker as short as possible. PCB traces and the speaker wire are the largest sources of emission.