SLAA988A December   2020  – January 2022 TAS2563

 

  1.   Trademarks
  2. 1Layout Guidelines
    1. 1.1  Typical Application Circuit
    2. 1.2  VBAT
    3. 1.3  DREG
    4. 1.4  GREG
    5. 1.5  PVDD and VBST
    6. 1.6  VDD
    7. 1.7  IOVDD
    8. 1.8  Output Pins
    9. 1.9  Sense Pins
    10. 1.10 Digital Portion
    11. 1.11 Ground Planes
  3. 2Schematic
    1. 2.1 Recommended External Components
  4. 3Decoupling Capacitors
  5. 4Revision History

Sense Pins

VSNS_N and VSNS_P are the voltage sense negative and positive inputs, respectively. These inputs are connected to the Class-D outputs (VSNS_N to OUT_N and VSNS_P to OUT_P) after the ferrite bead filter.

When routing these pins to the ferrite bead filter, it is necessary to the make the connection to its respective output at the speaker terminal, not to a pin or trace. In addition, TI recommends adding a 1-kΩ resistor for each voltage sense path. This practice helps to reduce emissions and reduce ICN increments that result from the EMI filter.

GUID-20201210-CA0I-KRL9-MQTH-MZ6VTLHBLQVN-low.pngFigure 1-11 VSNS_P and VSNS_N Connections