SLAAEE6 October   2023 MSPM0L1306 , MSPM0L1306

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Introduction
  6. 3Software Introduction
  7. 4Gauge GUI Introduction
  8. 5Current Detection and Calibration Method
    1. 5.1 MSPM0 OPA Introduction
      1. 5.1.1 OPA input and output limitation
      2. 5.1.2 OPA Accuracy Influence
    2. 5.2 Current Detection Method
    3. 5.3 Current Calibration Method
      1. 5.3.1 (R1+R2)/R2 calibration
      2. 5.3.2 OPA1 Voffset calibration
      3. 5.3.3 R3/(R4+R3) calibration
      4. 5.3.4 Vref calibration
  9. 6Solution Evaluation Steps
    1. 6.1 Step1: Hardware Preparation
    2. 6.2 Step2: Evaluation
  10. 7MSPM0 Gauge Solution Test Results
    1. 7.1 Calibration Test Result
    2. 7.2 Current Detection Result
      1. 7.2.1 Test Under 25°C
      2. 7.2.2 Test Under 0°C
      3. 7.2.3 Test Under 50°C
      4. 7.2.4 Conclusion
    3. 7.3 Current Consumption Test
  11. 8Solution Summery and Improvement Direction
    1. 8.1 Shunter Resistor
    2. 8.2 ADC and its Reference
    3. 8.3 Runtime Calibration

Current Detection Method

In this part, equations will be used to show how to do the current detection with dynamic GAIN setting by changing the resistor value of R3 and R4 in Figure 5-1.

Equation 1 shows the OPA1 output voltage. I is the current to be tested. Voffset includes the influence of voltage offset and bias current.

Equation 1. Vo=VDAC+OPA0-IRSR1+R2*R1+IRS1+R4R3+Voffset=(R1R1+R2VDAC+OPA0+R2R1+R2IRS)R3+R4R3+Voffset

The OPA1 output voltage is recorded as a reference for the current calculation, when I = 0. Here Vref is used to represent it in Equation 2.

Equation 2. Vref=R1R1+R2R3+R4R3VDAC+OPA0+Voffset

When I != 0, the gap between OPA1 output voltage and Vref will be as shown in Equation 3.

Equation 3. Vo-Vref=R2R1+R2R3+R4R3IRS

After that subtraction, you can remove the Voffset influence and the current can be calculated using Equation 4.

Equation 4. I=Vo-VrefRSR3R4+R3R1+R2R2

The thing to consider when changing the gain is the Common Voltage(Vc), as changing the gain setting can cause the structure unsymmetrical. If you take Vc into consideration, the OPA1 output voltage can be as shown in Equation 5.

Equation 5. Vo=VDAC+OPA0-IRS-VcR1+R2*R1+IRS+Vc-Vc1+R4R3+Voffset+Vc=(R1R1+R2VDAC+OPA0+R2R1+R2IRS)R3+R4R3+Voffset+ R1R1+R2*R3+R4R3-1*Vc

To control the structure mismatch influence, you need to control the voltage level of Vc. That is why you need to assign the MCU GND to be closed to the Rs on the PCB layout.