2 Using the EVM

The ADS78x1EVM serves as a reference design, prototype board, and test platform for the software engineer to develop code.

As a reference design, the ADS78x1EVM contains the essential circuitry to showcase the ADC. This essential circuitry includes the input amplifier, reference circuit, and buffers. The EVM analog input circuit is optimized for a 1-MHz sine wave, therefore users may need to adjust the resistor and capacitor values of the ADC input RC circuit. In AC-type applications where signal distortion is a concern, use polypropylene capacitors in the signal path. In applications where the input is multiplexed, either adjust or remove the ADC input resistor and capacitor, as needed.

As a prototype board, the buffer circuit consists of a footprint in a standard 8-pin SOIC and resistor pads for inverting and noninverting configurations. The ADS78x1EVM can be used to evaluate both dual- and single-supply amplifiers. The EVM comes installed with a dual-supply amplifier that allows the user to take advantage of the full input voltage range of the converter. For applications that require signal supply operation and smaller input voltage ranges, the THS4031 can be replaced with a single-supply amplifier, such as the OPA300. Short pad jumper SJP7 between pads 1 and 2, because SJP7 shorts the minus supply pin of the amplifier to ground. The positive supply voltage can be applied via test point TP12 or connector J1 pin 1.

As a software test platform, connectors P1, P2, and P3 plug into the parallel interface connectors of the 5-6K interface card. The 5-6K interface card sits on the C5000 and C6000 digital signal processor starter kit (DSK). The ADS78x1EVM is then mapped into the processor memory space. This card also provides an area for signal conditioning. This area can be used to install application circuits for digitization by the ADS7881 or ADS7891 ADC. See the 5–6K Interface Board user's guide for more information.

For the software engineer, the ADS78x1EVM provides a simple platform for interfacing to the converter. The EVM provides standard 0.1" headers and sockets to wire into prototype boards. The user must only provide three address lines (A2, A1, and A0) and one address valid line (DC_CS) to connector P2, as shown in Figure 2-1. To choose which address combinations generate RD, CONVST, and RESET set jumpers as shown in Table 1-5. Recall that the chip select (CS) signal is not memory mapped or tied to P2, and therefore must be controlled via a general-purpose pin or shorted to ground at the J3 pin 1. If address decoding is not required, the EVM provides direct access to converter data bus via P3 and control via J3.

Figure 2-1 Decoding Control Signals Using the Address Bus