SLAU858A november   2021  – june 2023

 

  1.   1
  2.   AFE881H1 Evaluation Module
  3.   Trademarks
  4. 1Overview
    1. 1.1 Kit Contents
    2. 1.2 Related Documentation From Texas Instruments
  5. 2USB2ANY Interface Adapter
    1. 2.1 Signal Definitions for J10
    2. 2.2 USB2ANY Theory of Operation
  6. 3EVM Hardware Overview
    1. 3.1 Electrostatic Discharge Caution
    2. 3.2 EVM Block Diagram
    3. 3.3 EVM Jumper Summary
    4. 3.4 Terminal and Pin Definitions
    5. 3.5 Connecting the USB2ANY
    6. 3.6 Connecting the USB Cable to the USB2ANY Interface Adapter
    7. 3.7 Optional EVM Operations
      1. 3.7.1 Power Configuration
      2. 3.7.2 External SPI and UART Controllers
  7. 4Software Overview
    1. 4.1 Software Installation
    2. 4.2 Launching the Software
    3. 4.3 Software Features
      1. 4.3.1 AFE881H1 Register Page
      2. 4.3.2 High Level Configuration Page
      3. 4.3.3 Using the Python Scripting Tool
  8. 5Schematics, PCB Layout, and Bill of Materials
    1. 5.1 Board Schematic
    2. 5.2 PCB Components Layout
    3. 5.3 Bill of Materials
  9. 6Revision History

2.1 Signal Definitions for J10

Table 2-1 shows the pinout for the 30-pin connector socket used to communicate between the EVM and the USB2ANY. Be aware that the I2C communications lines (I2C_SCL and I2C_SDA1) are not used. Both the connectors and cables from the USB2ANY to the AFE881H1EVM are keyed to make sure the cable is correctly connected.

Table 2-1 USB2ANY Connector AFE881H1EVM (J10) Pinout

Pin on J10

 Signal Definition
4, 6, 8, 16, 27, 28 GND Ground
11 ALARM

Alarm notification; open drain.

When an alarm occurs, this pin is held low. Otherwise, this pin goes to Hi-Z.
12 CS SPI communication for AFE881H1 chip select
13 MISO SPI communication for AFE881H1 digital output
14 MOSI SPI communication for AFE881H1 digital input
15 3p3V 3.3-V supply voltage
17 CD Carrier detect. A logic high on this pin indicates a valid carrier is present.
18 SCLK SPI communication for AFE881H1 digital clock
19 GPIO1 GPIO1 (unused)
20 GPIO2 GPIO2 (unused)
25 RTS

Request to send.

A logic high on this pin enables the demodulator and disables the modulator.

A logic low on this pin enables the modulator and disables the demodulator.

Do not leave any digital input pins floating.
26 UARTOUT UART data output.
29 RESET

Reset.

A logic low on this pin places the device into power-down mode and resets the device.

Logic high returns the device to normal operation.

Do not leave any digital input pins floating.
30 UARTIN UART data input. Do not leave any digital input pins floating.
1, 2, 3, 5, 7, 9, 10, 21, 22, 23, 24 NC Not connected