SLAZ308AD October   2012  – May 2021 MSP430F5522

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      ZQE80
      2.      RGC64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC25
    2. 6.2  ADC27
    3. 6.3  ADC29
    4. 6.4  ADC42
    5. 6.5  ADC69
    6. 6.6  BSL6
    7. 6.7  BSL7
    8. 6.8  COMP10
    9. 6.9  CPU21
    10. 6.10 CPU22
    11. 6.11 CPU23
    12. 6.12 CPU26
    13. 6.13 CPU27
    14. 6.14 CPU28
    15. 6.15 CPU29
    16. 6.16 CPU30
    17. 6.17 CPU31
    18. 6.18 CPU32
    19. 6.19 CPU33
    20. 6.20 CPU34
    21. 6.21 CPU35
    22. 6.22 CPU37
    23. 6.23 CPU39
    24. 6.24 CPU40
    25. 6.25 CPU47
    26. 6.26 DMA4
    27. 6.27 DMA7
    28. 6.28 DMA8
    29. 6.29 DMA10
    30. 6.30 EEM9
    31. 6.31 EEM11
    32. 6.32 EEM13
    33. 6.33 EEM14
    34. 6.34 EEM15
    35. 6.35 EEM16
    36. 6.36 EEM17
    37. 6.37 EEM19
    38. 6.38 EEM21
    39. 6.39 EEM23
    40. 6.40 FLASH33
    41. 6.41 FLASH34
    42. 6.42 FLASH35
    43. 6.43 FLASH37
    44. 6.44 JTAG20
    45. 6.45 JTAG26
    46. 6.46 JTAG27
    47. 6.47 MPY1
    48. 6.48 PMAP1
    49. 6.49 PMM9
    50. 6.50 PMM10
    51. 6.51 PMM11
    52. 6.52 PMM12
    53. 6.53 PMM14
    54. 6.54 PMM15
    55. 6.55 PMM17
    56. 6.56 PMM18
    57. 6.57 PMM20
    58. 6.58 PORT15
    59. 6.59 PORT16
    60. 6.60 PORT19
    61. 6.61 PORT24
    62. 6.62 RTC3
    63. 6.63 RTC6
    64. 6.64 SYS10
    65. 6.65 SYS12
    66. 6.66 SYS14
    67. 6.67 SYS16
    68. 6.68 SYS18
    69. 6.69 TAB23
    70. 6.70 USB4
    71. 6.71 USB6
    72. 6.72 USB8
    73. 6.73 USB9
    74. 6.74 USB10
    75. 6.75 USB11
    76. 6.76 USB12
    77. 6.77 USB13
    78. 6.78 USCI26
    79. 6.79 USCI30
    80. 6.80 USCI31
    81. 6.81 USCI34
    82. 6.82 USCI35
    83. 6.83 USCI39
    84. 6.84 USCI40
    85. 6.85 WDG4
  7. 7Revision History

PMM15

PMM Module

Category

Functional

Function

Device may not wake up from LPM2, LPM3, or LPM4

Description

Device may not wake up from LPM2, LPM3 or LMP4 if an interrupt occurs within 1 us after the entry to the specified LPMx; entry can be caused either by user code or automatically (for example, after a previous ISR is completed). Device can be recovered with an external reset or a power cycle. Additionally, a PUC can also be used to reset the failing condition and bring the device back to normal operation (for example, a PUC caused by the WDT).

This effect is seen when:
- A write to the SVSMHCTL and SVSMLCTL registers is immediately followed by an LPM2, LPM3, LPM4 entry without waiting the requisite settling time ((PMMIFG.SVSMLDLYIFG = 0 and PMMIFG.SVSMHDLYIFG = 0)).

or

The following two conditions are met:

- The SVSL module is configured for a fast wake-up or when the SVSL/SVML module is turned off. The affected SVSMLCTL register settings are shaded in the following table.


GUID-20201119-CA0I-RD0T-58PG-VHRCJ71FXJT6-low.png


and

-The SVSH/SVMH module is configured to transition from Normal mode to an OFF state when moving from Active/LPM0/LPM1 into LPM2/LPM3/LPM4 modes. The affected SVSMHCTL register settings are shaded in the following table.


GUID-20201119-CA0I-HRBM-DP5W-NFBNZBTTJFBM-low.png

Workaround

Any write to the SVSMxCTL register must be followed by a settling delay (PMMIFG.SVSMLDLYIFG = 0 and PMMIFG.SVSMHDLYIFG = 0) before entering LPM2, LPM3, LPM4.

and

1. Ensure the SVSx, SVMx are configured to prevent the issue from occurring by the following:

- Configure the SVSL module for slow wake up (SVSLFP = 0). Note that this will increase the wakeup time from LPM2/3/4 to twakeupslow (~150 us).

or

- Do not configure the SVSH/SVMH such that the modules transition from Normal mode to an OFF state on LPM entry and ensure SVSH/SVMH is in manual mode. Instead force the modules to remain ON even in LPMx. Note that this will cause increased power consumption when in LPMx.

Refer to the MSP430 Driver Library(MSPDRIVERLIB) for proper PMM configuration functions.
Use the following function, PMM15Check (void), to determine whether or not the existing PMM configuration is affected by the erratum. The return value of the function is 1 if the configuration is affected, and 0 if the configuration is not affected.

unsigned char PMM15Check (void)
{
   // First check if SVSL/SVML is configured for fast wake-up
   if ( (!(SVSMLCTL & SVSLE)) || ((SVSMLCTL & SVSLE) && (SVSMLCTL & SVSLFP)) ||
        (!(SVSMLCTL & SVMLE)) || ((SVSMLCTL & SVMLE) && (SVSMLCTL & SVMLFP)) )
   { // Next Check SVSH/SVMH settings to see if settings are affected by PMM15
      if ((SVSMHCTL & SVSHE) && (!(SVSMHCTL & SVSHFP)))
      {
         if ( (!(SVSMHCTL & SVSHMD)) || ((SVSMHCTL & SVSHMD) &&
              (SVSMHCTL & SVSMHACE)) )
           return 1; // SVSH affected configurations
      }
      if ((SVSMHCTL & SVMHE) && (!(SVSMHCTL & SVMHFP)) && (SVSMHCTL & SVSMHACE))
          return 1; // SVMH affected configurations
      }
      return 0; // SVS/M settings not affected by PMM15
   }
}

2. If fast servicing of interrupts is required, add a 150us delay either in the interrupt service routine or before entry into LPM3/LPM4.