SLAZ541T July   2013  – May 2021 MSP430F5232

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      RGZ48
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BSL7
    2. 6.2  COMP10
    3. 6.3  CPU21
    4. 6.4  CPU22
    5. 6.5  CPU40
    6. 6.6  CPU47
    7. 6.7  DMA4
    8. 6.8  DMA7
    9. 6.9  DMA10
    10. 6.10 EEM17
    11. 6.11 EEM19
    12. 6.12 EEM21
    13. 6.13 EEM23
    14. 6.14 JTAG26
    15. 6.15 JTAG27
    16. 6.16 PMAP1
    17. 6.17 PMM9
    18. 6.18 PMM11
    19. 6.19 PMM12
    20. 6.20 PMM14
    21. 6.21 PMM15
    22. 6.22 PMM18
    23. 6.23 PMM20
    24. 6.24 PORT15
    25. 6.25 PORT19
    26. 6.26 PORT33
    27. 6.27 RTC3
    28. 6.28 RTC6
    29. 6.29 SYS12
    30. 6.30 SYS16
    31. 6.31 UCS7
    32. 6.32 UCS9
    33. 6.33 UCS11
    34. 6.34 USCI26
    35. 6.35 USCI34
    36. 6.36 USCI35
    37. 6.37 USCI39
    38. 6.38 USCI40
  7. 7Revision History

PMM15

PMM Module

Category

Functional

Function

Device may not wake up from LPM2, LPM3, or LPM4

Description

Device may not wake up from LPM2, LPM3 or LMP4 if an interrupt occurs within 1 us after the entry to the specified LPMx; entry can be caused either by user code or automatically (for example, after a previous ISR is completed). Device can be recovered with an external reset or a power cycle. Additionally, a PUC can also be used to reset the failing condition and bring the device back to normal operation (for example, a PUC caused by the WDT).

This effect is seen when:
- A write to the SVSMHCTL and SVSMLCTL registers is immediately followed by an LPM2, LPM3, LPM4 entry without waiting the requisite settling time ((PMMIFG.SVSMLDLYIFG = 0 and PMMIFG.SVSMHDLYIFG = 0)).

or

The following two conditions are met:

- The SVSL module is configured for a fast wake-up or when the SVSL/SVML module is turned off. The affected SVSMLCTL register settings are shaded in the following table.


GUID-20201119-CA0I-RD0T-58PG-VHRCJ71FXJT6-low.png


and

-The SVSH/SVMH module is configured to transition from Normal mode to an OFF state when moving from Active/LPM0/LPM1 into LPM2/LPM3/LPM4 modes. The affected SVSMHCTL register settings are shaded in the following table.


GUID-20201119-CA0I-HRBM-DP5W-NFBNZBTTJFBM-low.png

Workaround

Any write to the SVSMxCTL register must be followed by a settling delay (PMMIFG.SVSMLDLYIFG = 0 and PMMIFG.SVSMHDLYIFG = 0) before entering LPM2, LPM3, LPM4.

and

1. Ensure the SVSx, SVMx are configured to prevent the issue from occurring by the following:

- Configure the SVSL module for slow wake up (SVSLFP = 0). Note that this will increase the wakeup time from LPM2/3/4 to twakeupslow (~150 us).

or

- Do not configure the SVSH/SVMH such that the modules transition from Normal mode to an OFF state on LPM entry and ensure SVSH/SVMH is in manual mode. Instead force the modules to remain ON even in LPMx. Note that this will cause increased power consumption when in LPMx.

Refer to the MSP430 Driver Library(MSPDRIVERLIB) for proper PMM configuration functions.
Use the following function, PMM15Check (void), to determine whether or not the existing PMM configuration is affected by the erratum. The return value of the function is 1 if the configuration is affected, and 0 if the configuration is not affected.

unsigned char PMM15Check (void)
{
   // First check if SVSL/SVML is configured for fast wake-up
   if ( (!(SVSMLCTL & SVSLE)) || ((SVSMLCTL & SVSLE) && (SVSMLCTL & SVSLFP)) ||
        (!(SVSMLCTL & SVMLE)) || ((SVSMLCTL & SVMLE) && (SVSMLCTL & SVMLFP)) )
   { // Next Check SVSH/SVMH settings to see if settings are affected by PMM15
      if ((SVSMHCTL & SVSHE) && (!(SVSMHCTL & SVSHFP)))
      {
         if ( (!(SVSMHCTL & SVSHMD)) || ((SVSMHCTL & SVSHMD) &&
              (SVSMHCTL & SVSMHACE)) )
           return 1; // SVSH affected configurations
      }
      if ((SVSMHCTL & SVMHE) && (!(SVSMHCTL & SVMHFP)) && (SVSMHCTL & SVSMHACE))
          return 1; // SVMH affected configurations
      }
      return 0; // SVS/M settings not affected by PMM15
   }
}

2. If fast servicing of interrupts is required, add a 150us delay either in the interrupt service routine or before entry into LPM3/LPM4.